ADUC7024BCPZ62 Analog Devices Inc, ADUC7024BCPZ62 Datasheet - Page 27

IC MCU FLSH 62K ANLG I/O 64LFCSP

ADUC7024BCPZ62

Manufacturer Part Number
ADUC7024BCPZ62
Description
IC MCU FLSH 62K ANLG I/O 64LFCSP
Manufacturer
Analog Devices Inc
Series
MicroConverter® ADuC7xxxr
Datasheet

Specifications of ADUC7024BCPZ62

Core Size
16/32-Bit
Program Memory Size
62KB (62K x 8)
Design Resources
Sensing Low-g Acceleration Using ADXL345 Digital Accelerometer Connected to ADuC7024 (CN0133)
Core Processor
ARM7
Speed
44MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
PLA, PWM, PSM, Temp Sensor, WDT
Number Of I /o
30
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 10x12b; D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
64-LFCSP
Controller Family/series
(ARM7) ADUC
No. Of I/o's
30
Ram Memory Size
8KB
Cpu Speed
44MHz
No. Of Timers
4
Digital Ic Case Style
LFCSP
Embedded Interface Type
I2C, SPI, UART
Rohs Compliant
Yes
Package
64LFCSP EP
Device Core
ARM7TDMI
Family Name
ADuC7xxx
Maximum Speed
44 MHz
Operating Supply Voltage
3.3 V
Data Bus Width
16|32 Bit
Number Of Programmable I/os
30
Interface Type
I2C/SPI/UART
On-chip Adc
10-chx12-bit
On-chip Dac
2-chx12-bit
Number Of Timers
4
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

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ADUC7028
Table 14. Pin Function Descriptions (ADuC7028)
Ball No.
A1
A2
A3
A4
A5
A6
A7
A8
B1
B2
B3
B4
B5
B6
B7
B8
C1
C2
C3
C4
C5
C6
C7
C8
D1
D2
D3
D4
D5
D6
Mnemonic
ADC3/CMP1
DACV
AV
AGND
DACGND
P4.2/PLAO[10]
P1.1/SPM1/PLAI[1]
P1.2/SPM2/PLAI[2]
ADC4
ADC2/CMP0
ADC1
DAC
V
P1.0/T1/SPM0/PLAI[0]
P1.4/SPM4/PLAI[4]/IRQ2
P1.3/SPM3/PLAI[3]
ADC6
ADC5
ADC0
P4.5/PLAO[13]
P4.3/PLAO[11]
P4.0/PLAO[8]
P4.1/PLAO[9]
IOGND
ADCNEG
GND
ADC7
P4.4/PLAO[12]
P3.6/PWM
P1.7/SPM7/PLAO[0]
REF
DD
REF
REF
DD
TRIP
/PLAI[14]
Figure 16. 64-Ball BGA Pin Configuration (ADuC7028)
Description
Single-Ended or Differential Analog Input 3/Comparator Negative Input.
3.3 V Power Supply for the DACs. Must be connected to AV
3.3 V Analog Power.
Analog Ground. Ground reference point for the analog circuitry.
Ground for the DAC. Typically connected to AGND.
General-Purpose Input and Output Port 4.2/Programmable Logic Array Output Element 10.
Serial Port Multiplexed. General-Purpose Input and Output Port 1.1/UART, I2C0/Programmable
Logic Array Input Element 1.
Serial Port Multiplexed. General-Purpose Input and Output Port 1.2/UART, I2C1/Programmable
Logic Array Input Element 2.
Single-Ended or Differential Analog Input 4.
Single-Ended or Differential Analog Input 2/Comparator Positive Input.
Single-Ended or Differential Analog Input 1.
External Voltage Reference for the DACs. Range: DACGND to DACV
2.5 V Internal Voltage Reference. Must be connected to a 0.47 μF capacitor when using the
internal reference.
Serial Port Multiplexed. General-Purpose Input and Output Port 1.0/Timer1 Input/UART, I2C0/
Programmable Logic Array Input Element 0.
Serial Port Multiplexed. General-Purpose Input and Output Port 1.4/UART, SPI/Programmable
Logic Array Input Element 4/External Interrupt Request 2, Active High.
Serial Port Multiplexed. General-Purpose Input and Output Port 1.3/UART, I2C1/Programmable
Logic Array Input Element 3.
Single-Ended or Differential Analog Input 6.
Single-Ended or Differential Analog Input 5.
Single-Ended or Differential Analog Input 0.
General-Purpose Input and Output Port 4.5/Programmable Logic Array Output Element 13.
General-Purpose Input and Output Port 4.3/Programmable Logic Array Output Element 11.
General-Purpose Input and Output Port 4.0/Programmable Logic Array Output Element 8.
General-Purpose Input and Output Port 4.1/Programmable Logic Array Output Element 9.
Ground for GPIO (see Table 78). Typically connected to DGND.
Bias Point or Negative Analog Input of the ADC in Pseudo Differential Mode. Must be
connected to the ground of the signal to convert. This bias point must be between 0 V and 1 V.
Ground Voltage Reference for the ADC. For optimal performance, the analog power supply
should be separated from IOGND and DGND.
Single-Ended or Differential Analog Input 7.
General-Purpose Input and Output Port 4.4/Programmable Logic Array Output Element 12.
General-Purpose Input and Output Port 3.6/PWM Safety Cutoff/Programmable Logic Array
Input Element 14.
Serial Port Multiplexed. General-Purpose Input and Output Port 1.7/UART, SPI/Programmable
Logic Array Output Element 0.
8
7
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BOTTOM VIEW
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