ZLF645E0Q2064G Zilog, ZLF645E0Q2064G Datasheet - Page 175
ZLF645E0Q2064G
Manufacturer Part Number
ZLF645E0Q2064G
Description
IC MCU 64K FLASH 1K RAM 20-QFN
Manufacturer
Zilog
Series
Crimzon™ ZLFr
Specifications of ZLF645E0Q2064G
Core Processor
Z8 LXMC
Core Size
8-Bit
Speed
8MHz
Connectivity
UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, WDT
Number Of I /o
16
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.9 V ~ 3.6 V
Operating Temperature
0°C ~ 70°C
Package / Case
20-VQFN Exposed Pad, 20-HVQFN, 20-SQFN, 20-DHVQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Oscillator Type
-
Other names
269-4723
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ZLF645E0Q2064G
Manufacturer:
Maxim
Quantity:
28
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PS026407-0408
Table 84. User Option Byte 0 (OPT0)
Bit Position
[7]
[7:0]
Bit
Field
Erased State
Flash Address
User Option Bit Locations in Flash Memory
User Option Bit Shadow Register Access
User Option Byte 0 and Option Byte 0 Shadow
Register Definitions
The Option Bit Shadow registers are part of the ZLF645’s Register File and are accessible
for read/write access.
The user option bits are located in the upper two bytes of the Information block, address
FFh and FEh.
Except for bits 0 and 1 of the User Option Byte 1 Shadow register, the CPU has full
read/write access to all the User Option Byte Shadow registers at the address locations
given in register tables for each register.
This option byte allows user control over the enabling of the ZLF645’s I/O pull-ups and
the conditions under which the devices watchdog timer is enabled. For its associated
shadow registers, until the registers are loaded with their corresponding option bit values,
their outputs will be in an unknown state.
Value
1
0
WDT
7
1
Description
WDT—Watchdog Timer Enable
WDT = 1: WDT is enabled by WDT instruction only.
WDT = 0: WDT is always enabled.
P4PU through P0LPU—GPIO Pin Pull-Up Enables
P4P = 1: Port 4 Pull-ups are not enabled.
P4P = 0: Port 4 Pull-ups enabled.
P3PU = 0: Port 3 Pull-ups disabled.
P3PU = 0: Port 3 Pull-ups enabled.
P4PU
6
1
Flash Memory Information Area address: FEH
P3PU
5
1
P2PU
4
1
P1HPU
3
1
ZLF645 Series Flash MCUs
P1LPU
2
1
Product Specification
P0HPU
1
1
Operation
P0LPU
0
1
167
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