STM8S207S6T6C STMicroelectronics, STM8S207S6T6C Datasheet - Page 78

• Manufacturer Part Number: STM8S207S6T6C
• Description: MCU 8BIT 32K MEMORY 44-LQFP
• Manufacturer: STMicroelectronics
• Series: STM8Sr

Specifications of STM8S207S6T6C

• Mfg Application Notes: STM8S Getting Started
• Core Processor: STM8
• Core Size: 8-Bit
• Speed: 24MHz
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 34
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.95 V ~ 5.5 V
• Data Converters: A/D 9x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-LQFP
• Processor Series: STM8S20x
• Core: STM8
• Data Bus Width: 8 bit
• Data Ram Size: 6 KB
• Interface Type: CAN, 12C, SPI, UART
• Maximum Clock Frequency: 24 MHz
• Number Of Programmable I/os: 34
• Number Of Timers: 2
• Operating Supply Voltage: 2.95 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWSTM8
• Development Tools By Supplier: STICE-SYS001
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• For Use With: 497-10032 - EVAL KIT MOTOR CONTROL STM8S497-10031 - EVAL KIT TOUCH SENSING STM8S497-10592 - BOARD DAUGHTER FOR STM8S207/8497-10593 - KIT STARTER FOR STM8S207/8 SER497-8506 - BOARD EVAL FOR STM8S
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 497-8955; STM8S207S6T6C

Electrical characteristics
78/105
Figure 34. Typical NRST pull-up resistance vs V
Figure 35. Typical NRST pull-up current vs V
The reset network shown in
must ensure that the level on the NRST pin can go below the V
Table
sensitive applications, the capacity of the external reset capacitor can be reduced to limit
charge/discharge current. If the NRSTsignal is used to reset the external circuitry, care must
be taken of the charge/discharge time of the external capacitor to fulfill the external device’s
reset timing conditions. The minimum recommended capacity is 10 nF.
Figure 36. Recommended reset pin protection
(optional)
37. Otherwise the reset is not taken into account internally. For power consumption
External
circuit
reset
140
120
100
80
60
40
20
0.1µF
0
0
60
55
50
45
40
35
30
Figure 36
2.5
Doc ID 14733 Rev 11
1
3
NRST
protects the device against parasitic resets. The user
3.5
2
V
DD
4
R
V
PU
V
DD
DD
3
[V]
[V]
4.5
DD
@ 4 temperatures
DD
5
4
@ 4 temperatures
Filter
5.5
5
STM8S207xx, STM8S208xx
-40˚C
25˚C
85˚C
125˚C
IL
6
max. level specified in
Internal reset
ai15069
-40˚C
25˚C
85˚C
125˚C
6
STM8