STM8S207C6T6 STMicroelectronics, STM8S207C6T6 Datasheet - Page 15

• Manufacturer Part Number: STM8S207C6T6
• Description: MCU 8BIT 32K MEMORY 48-LQFP
• Manufacturer: STMicroelectronics
• Series: STM8Sr

Specifications of STM8S207C6T6

• Mfg Application Notes: STM8S Getting Started
• Core Processor: STM8
• Core Size: 8-Bit
• Speed: 24MHz
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 38
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.95 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-LQFP
• Processor Series: STM8S20x
• Core: STM8
• Data Bus Width: 8 bit
• Data Ram Size: 6 KB
• Interface Type: CAN, 12C, SPI, UART
• Maximum Clock Frequency: 24 MHz
• Number Of Programmable I/os: 38
• Number Of Timers: 2
• Operating Supply Voltage: 2.95 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWSTM8
• Development Tools By Supplier: STICE-SYS001
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• For Use With: 497-10032 - EVAL KIT MOTOR CONTROL STM8S497-10031 - EVAL KIT TOUCH SENSING STM8S497-10592 - BOARD DAUGHTER FOR STM8S207/8497-10593 - KIT STARTER FOR STM8S207/8 SER497-8506 - BOARD EVAL FOR STM8S
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 497-8950; STM8S207C6T6

STM8S207xx, STM8S208xx
4.4
Flash program and data EEPROM memory
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Write protection (WP)
Write protection of Flash program memory and data EEPROM is provided to avoid
unintentional overwriting of memory that could result from a user software malfunction.
There are two levels of write protection. The first level is known as MASS (memory access
security system). MASS is always enabled and protects the main Flash program memory,
data EEPROM and option bytes.
To perform in-application programming (IAP), this write protection can be removed by writing
a MASS key sequence in a control register. This allows the application to write to data
EEPROM, modify the contents of main program memory or the device option bytes.
A second level of write protection, can be enabled to further protect a specific area of
memory known as UBC (user boot code). Refer to
The size of the UBC is programmable through the UBC option byte
increments of 1 page (512 bytes) by programming the UBC option byte in ICP mode.
This divides the program memory into two areas:
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The UBC area remains write-protected during in-application programming. This means that
the MASS keys do not unlock the UBC area. It protects the memory used to store the boot
program, specific code libraries, reset and interrupt vectors, the reset routine and usually the
IAP and communication routines.
Figure 2.
Up to 128 Kbytes of high density Flash program single voltage Flash memory
Up to 2K bytes true data EEPROM
Read while write: Writing in data memory possible while executing code in program
memory.
User option byte area
Main program memory: Up to 128 Kbytes minus UBC
User-specific boot code (UBC): Configurable up to 128 Kbytes
Up to
128 Kbytes
Flash
program
memory
Data
EEPROM
memory
Flash memory organisation
Remains write protected during IAP
Data memory area (2 Kbytes)
Write access possible for IAP
Doc ID 14733 Rev 11
Program memory area
Option bytes
UBC area
Figure
2.
Programmable area from 1 Kbyte
(2 first pages) up to 128 Kbytes
(1 page steps)
(Table
Product overview
13.), in
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