STM8S207R8T6 STMicroelectronics, STM8S207R8T6 Datasheet - Page 43

• Manufacturer Part Number: STM8S207R8T6
• Description: MCU 8BIT 64K MEMORY 64-LQFP
• Manufacturer: STMicroelectronics
• Series: STM8Sr

Specifications of STM8S207R8T6

• Mfg Application Notes: STM8S Getting Started
• Core Processor: STM8
• Core Size: 8-Bit
• Speed: 24MHz
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 52
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 1.5K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.95 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-LQFP
• Processor Series: STM8S20x
• Core: STM8
• Data Bus Width: 8 bit
• Data Ram Size: 6 KB
• Interface Type: CAN, 12C, SPI, UART
• Maximum Clock Frequency: 24 MHz
• Number Of Programmable I/os: 52
• Number Of Timers: 2
• Operating Supply Voltage: 2.95 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWSTM8
• Development Tools By Supplier: STICE-SYS001
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• For Use With: 497-10032 - EVAL KIT MOTOR CONTROL STM8S497-10031 - EVAL KIT TOUCH SENSING STM8S497-10592 - BOARD DAUGHTER FOR STM8S207/8497-10593 - KIT STARTER FOR STM8S207/8 SER497-8506 - BOARD EVAL FOR STM8S
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 497-8954; STM8S207R8T6

STM8S207xx, STM8S208xx
Table 9.
0x00 5331 to
0x00 5347 to
0x00 532A
0x00 532B
0x00 532C
0x00 532D
0x00 532E
0x00 53FF
0x00 5320
0x00 5321
0x00 5322
0x00 5323
0x00 5324
0x00 5325
0x00 5326
0x00 5327
0x00 5328
0x00 5329
0x00 532F
0x00 5330
0x00 533F
0x00 5340
0x00 5341
0x00 5342
0x00 5343
0x00 5344
0x00 5345
0x00 5346
Address
General hardware register map (continued)
Block
TIM3
TIM4
Register label
TIM3_CCMR1
TIM3_CCMR2
TIM3_CNTRH
TIM3_CCR1H
TIM3_CCR2H
TIM3_CCER1
TIM3_CNTRL
TIM3_CCR1L
TIM3_CCR2L
TIM3_ARRH
TIM3_PSCR
TIM4_CNTR
TIM4_PSCR
TIM3_ARRL
TIM3_EGR
TIM4_EGR
TIM3_CR1
TIM4_CR1
TIM4_ARR
TIM3_SR1
TIM3_SR2
TIM3_IER
TIM4_IER
TIM4_SR
Doc ID 14733 Rev 11
Reserved area (185 bytes)
Reserved area (15 bytes)
TIM3 capture/compare enable register 1
TIM3 capture/compare mode register 1
TIM3 capture/compare mode register 2
TIM3 capture/compare register 1 high
TIM3 capture/compare register 2 high
TIM3 capture/compare register 1 low
TIM3 capture/compare register 2 low
TIM3 event generation register
TIM4 event generation register
TIM3 auto-reload register high
TIM3 interrupt enable register
TIM4 interrupt enable register
TIM3 auto-reload register low
TIM4 auto-reload register
TIM3 prescaler register
TIM4 prescaler register
TIM3 control register 1
TIM4 control register 1
TIM3 status register 1
TIM3 status register 2
TIM4 status register
TIM3 counter high
TIM3 counter low
Register name
TIM4 counter
Memory and register map
status
Reset
0xFF
0xFF
0xFF
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
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