MC9S08AC8CFGE Freescale Semiconductor, MC9S08AC8CFGE Datasheet - Page 108

IC MCU 8BIT 8K FLASH 44-LQFP

MC9S08AC8CFGE

Manufacturer Part Number
MC9S08AC8CFGE
Description
IC MCU 8BIT 8K FLASH 44-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet

Specifications of MC9S08AC8CFGE

Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
34
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-LQFP
Processor Series
S08AC
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
700 B
Interface Type
I2C, SCI, SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
34
Number Of Timers
3
Operating Supply Voltage
- 0.3 V to + 5.8 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
DEMO9S08AC60E, DEMOACEX, DEMOACKIT, DCF51AC256, DC9S08AC128, DC9S08AC16, DC9S08AC60, DEMO51AC256KIT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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0
Chapter 7 Central Processor Unit (S08CPUV2)
7.2
Figure 7-1
7.2.1
The A accumulator is a general-purpose 8-bit register. One operand input to the arithmetic logic unit
(ALU) is connected to the accumulator and the ALU results are often stored into the A accumulator after
arithmetic and logical operations. The accumulator can be loaded from memory using various addressing
modes to specify the address where the loaded data comes from, or the contents of A can be stored to
memory using various addressing modes to specify the address where data from A will be stored.
Reset has no effect on the contents of the A accumulator.
7.2.2
This 16-bit register is actually two separate 8-bit registers (H and X), which often work together as a 16-bit
address pointer where H holds the upper byte of an address and X holds the lower byte of the address. All
indexed addressing mode instructions use the full 16-bit value in H:X as an index reference pointer;
however, for compatibility with the earlier M68HC05 Family, some instructions operate only on the
low-order 8-bit half (X).
Many instructions treat X as a second general-purpose 8-bit register that can be used to hold 8-bit data
values. X can be cleared, incremented, decremented, complemented, negated, shifted, or rotated. Transfer
instructions allow data to be transferred from A or transferred to A where arithmetic and logical operations
can then be performed.
For compatibility with the earlier M68HC05 Family, H is forced to 0x00 during reset. Reset has no effect
on the contents of X.
108
Programmer’s Model and CPU Registers
shows the five CPU registers. CPU registers are not part of the memory map.
Accumulator (A)
Index Register (H:X)
H
CONDITION CODE REGISTER
15
15
INDEX REGISTER (HIGH)
16-BIT INDEX REGISTER H:X
PROGRAM COUNTER
MC9S08AC16 Series Data Sheet, Rev. 8
STACK POINTER
Figure 7-1. CPU Registers
8
V 1 1 H I N Z
7
7
7
INDEX REGISTER (LOW)
ACCUMULATOR
C
0
0
0
0
CARRY
ZERO
NEGATIVE
INTERRUPT MASK
HALF-CARRY (FROM BIT 3)
TWO’S COMPLEMENT OVERFLOW
SP
PC
CCR
A
X
Freescale Semiconductor

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