C8051F313-GM Silicon Laboratories Inc, C8051F313-GM Datasheet - Page 226

IC 8051 MCU 8K FLASH 28MLP

C8051F313-GM

Manufacturer Part Number
C8051F313-GM
Description
IC 8051 MCU 8K FLASH 28MLP
Manufacturer
Silicon Laboratories Inc
Series
C8051F31xr
Datasheets

Specifications of C8051F313-GM

Core Size
8-Bit
Program Memory Size
8KB (8K x 8)
Oscillator Type
Internal
Core Processor
8051
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
POR, PWM, Temp Sensor, WDT
Number Of I /o
25
Program Memory Type
FLASH
Ram Size
1.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 17x10b
Operating Temperature
-40°C ~ 85°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
No. Of I/o's
25
Ram Memory Size
1280Byte
Cpu Speed
25MHz
No. Of Timers
4
No. Of Pwm Channels
5
Digital Ic Case
RoHS Compliant
Rohs Compliant
Yes
Processor Series
C8051F3x
Core
8051
Data Bus Width
8 bit
Data Ram Size
1.25 KB
Interface Type
I2C, SMBus, SPI, UART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
25
Number Of Timers
5
Operating Supply Voltage
2.7 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F310DK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
Data Rom Size
128 B
Height
0.88 mm
Length
5 mm
Supply Voltage (max)
3.6 V
Supply Voltage (min)
2.7 V
Width
5 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
770-1006 - ISP 4PORT FOR SILABS C8051F MCU
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
336-1256
C8051F310/1/2/3/4/5/6/7
D
Revision 1.5 to Revision 1.6
Revision 1.6 to Revision 1.7
226
OCUMENT
Added two part numbers: C8051F316 and C8051F317
Changed package nomenclature from MLP to QFN.
Chapter 1.“System Overview”: Updated Table 1.1, “Product Selection Guide,” on page 18, with new
ordering part numbers; added block diagrams for the new parts, and updated Figure 1.13.
Added Table 3.2, “Electrical Characteristics Quick Reference,” on page 38.
Chapter 4.“Pinout and Package Definitions”: Updated Table 4.1 and added package diagrams for the
new parts.
Chapter 5.“10-Bit ADC (ADC0, C8051F310/1/2/3/6 only)”: Updated Figure 5.1, SFR Definition 5.1, and
SFR Definition 5.2 to show behavior of new parts.
Chapter 9.“Reset Sources”: Added note to SFR Definition 9.2 describing the behavior of read-modify-
write instructions on this register; Corrected Max VDD Ramp Time to 1 mS.
Chapter 10.“Flash Memory”: Updated Table 10.1 to accommodate the new parts; Added Table 10.2,
“Flash Security Summary,” on page 114 for clarity, replacing the Flash security summaries text.
Chapter 13.“Port Input/Output”: Updated text, Figure 13.1, Figure 13.3, Figure 13.4, and SFR Defini-
tion 13.7 through SFR Definition 13.17 to accommodate the new part numbers.
Chapter 18.“Programmable Counter Array”: In Table 18.3, corrected internal oscillator reset frequency
from 3,060,000 Hz to 3,062,500 Hz.
Chapter 20.“C2 Interface”: Updated C2 Register Definition 20.2 to accommodate the new part num-
bers. Corrected Device ID that is common to all 'F31x devices from 0x09 to 0x08; Removed references
to "boundary scan" because this feature is not supported by the 'F31x devices.
Fixed various minor errors.
Updated values in Table 3.1, “Global DC Electrical Characteristics,” on page 36.
Added Section
C
“10.4. Flash Write and Erase
HANGE
L
IST
Rev. 1.7
Guidelines” on page 115.

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