C8051F712-GQ Silicon Laboratories Inc, C8051F712-GQ Datasheet - Page 144
C8051F712-GQ
Manufacturer Part Number
C8051F712-GQ
Description
IC 8051 MCU 8K FLASH 48-TQFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F71xr
Specifications of C8051F712-GQ
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
Cap Sense, POR, PWM, Temp Sensor, WDT
Number Of I /o
39
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Eeprom Size
32 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-TQFP, 48-VQFP
Processor Series
C8051F7x
Core
8051
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
I2C, SMBus, SPI, UART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
39
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F700DK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
Package
48TQFP
Device Core
8051
Family Name
C8051F71x
Maximum Speed
25 MHz
Operating Supply Voltage
1.8|3 V
For Use With
336-1635 - DEV KIT FOR C8051F700
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
336-1644
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
C8051F712-GQ
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
Company:
Part Number:
C8051F712-GQR
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
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C8051F70x/71x
SFR Definition 21.5. EIP1: Extended Interrupt Priority 1
SFR Address = 0xCE; SFR Page = F
144
Name
Reset
Bit
Type
7
6
5
4
3
2
1
0
Bit
Reserved Must write 0b.
PWADC0 ADC0 Window Comparator Interrupt Priority Control.
PSMB0
PPCA0
PADC0
Name
PMAT
PCP0
PT3
R/W
PT3
7
0
Timer 3 Interrupt Priority Control.
This bit sets the priority of the Timer 3 interrupt.
0: Timer 3 interrupt set to low priority level.
1: Timer 3 interrupt set to high priority level.
Comparator0 (CP0) Interrupt Priority Control.
This bit sets the priority of the CP0 rising edge or falling edge interrupt.
0: CP0 interrupt set to low priority level.
1: CP0 interrupt set to high priority level.
Programmable Counter Array (PCA0) Interrupt Priority Control.
This bit sets the priority of the PCA0 interrupt.
0: PCA0 interrupt set to low priority level.
1: PCA0 interrupt set to high priority level.
ADC0 Conversion Complete Interrupt Priority Control.
This bit sets the priority of the ADC0 Conversion Complete interrupt.
0: ADC0 Conversion Complete interrupt set to low priority level.
1: ADC0 Conversion Complete interrupt set to high priority level.
This bit sets the priority of the ADC0 Window interrupt.
0: ADC0 Window interrupt set to low priority level.
1: ADC0 Window interrupt set to high priority level.
Port Match Interrupt Priority Control.
This bit sets the priority of the Port Match Event interrupt.
0: Port Match interrupt set to low priority level.
1: Port Match interrupt set to high priority level.
SMBus (SMB0) Interrupt Priority Control.
This bit sets the priority of the SMB0 interrupt.
0: SMB0 interrupt set to low priority level.
1: SMB0 interrupt set to high priority level.
Reserved
R/W
6
0
PCP0
R/W
5
0
PPCA0
R/W
Rev. 1.0
4
0
Function
PADC0
R/W
3
0
PWADC0
R/W
2
0
PMAT
R/W
1
0
PSMB0
R/W
0
0
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