R5F21184SP#U0 Renesas Electronics America, R5F21184SP#U0 Datasheet - Page 44
R5F21184SP#U0
Manufacturer Part Number
R5F21184SP#U0
Description
IC R8C MCU FLASH 16K 20SSOP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/R8C/Tiny/18r
Datasheets
1.R5F211A2SPU0.pdf
(300 pages)
2.R5F21181DSPU0.pdf
(43 pages)
3.R5F21181DSPU0.pdf
(259 pages)
Specifications of R5F21184SP#U0
Core Size
16-Bit
Program Memory Size
16KB (16K x 8)
Core Processor
R8C
Speed
20MHz
Connectivity
SIO, UART/USART
Peripherals
LED, POR, Voltage Detect, WDT
Number Of I /o
13
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 4x1b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
20-SSOP
No. Of I/o's
13
Ram Memory Size
1KB
Cpu Speed
20MHz
No. Of Timers
3
Digital Ic Case Style
SSOP
Supply Voltage Range
2.7V To 5.5V
Embedded Interface Type
UART
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
R0K521134S000BE - KIT EVAL STARTER FOR R8C/13R0E521174CPE10 - EMULATOR COMPACT R8C/18/19/1
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
- Current page: 44 of 300
- Download datasheet (2Mb)
Rev.2.00 Oct 17, 2005
REJ09B0001-0200
2.3 General Instruction Addressing
Chapter 2 Addressing Modes
Immediate
Register direct
Absolute
abs16
#IMM
#IMM8
#IMM16
#IMM20
R0L
R0H
R1L
R1H
R0
R1
R2
R3
A0
A1
Address register indirect
[A0]
[A1]
The value indicated by the content of
the address register (A0/A1) is the
effective address for the operation.
The effective address range is 00000
to 0FFFF
The immediate data indicated by #IMM
is the object of the operation.
The specified register is the object of
the operation.
The value indicated by abs16 is the
effective address for the operation.
The effective address range is 00000
0FFFF
16
page 24 of 263
.
16
.
16
to
16
A0 / A1
#IMM8
#IMM16
#IMM20
R0L / R1L
R0H / R1H
R0 / R1 / R2 /
R3 / A0 / A1
abs16
Register
address
b19
2.3 General Instruction Addressing
b15
b15
b15
b15
Memory
Register
b8 b7
b8
b8
b8
b7
b7
b7
Memory
b0
b0
b0
b0
b0
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