C8051F310-GQ Silicon Laboratories Inc, C8051F310-GQ Datasheet - Page 82

IC 8051 MCU 16K FLASH 32LQFP

C8051F310-GQ

Manufacturer Part Number
C8051F310-GQ
Description
IC 8051 MCU 16K FLASH 32LQFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F31xr
Datasheets

Specifications of C8051F310-GQ

Core Size
8-Bit
Program Memory Size
16KB (16K x 8)
Oscillator Type
Internal
Core Processor
8051
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
POR, PWM, Temp Sensor, WDT
Number Of I /o
29
Program Memory Type
FLASH
Ram Size
1.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 21x10b
Operating Temperature
-40°C ~ 85°C
Package / Case
32-LQFP
No. Of I/o's
29
Ram Memory Size
1280Byte
Cpu Speed
25MHz
No. Of Timers
4
No. Of Pwm Channels
5
Digital Ic Case
RoHS Compliant
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
770-1006 - ISP 4PORT FOR SILABS C8051F MCU336-1445 - ADAPTER PROGRAM TOOLSTICK F310336-1329 - KIT REF DESIGN SENSORLESS BLDC336-1253 - DEV KIT FOR C8051F310/F311
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
336-1252

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0
C8051F310/1/2/3/4/5
8.2.7. Register Descriptions
Following are descriptions of SFRs related to the operation of the CIP-51 System Controller. Reserved bits
should not be set to logic 1. Future product versions may use these bits to implement new features in
which case the reset value of the bit will be logic 0, selecting the feature's default state. Detailed descrip-
tions of the remaining SFRs are included in the sections of the data sheet associated with their corre-
sponding system function.
82
Register
TMR2L
TMR2RLH
TMR2RLL
TMR3CN
TMR3H
TMR3L
TMR3RLH
TMR3RLL
VDM0CN
XBR1
XBR0
0x84-0x86, 0x96-0x97,
0xAB-0xAF, 0xB4, 0xB9,
0xBF, 0xC7, 0xC9, 0xCE,
0xCF, 0xD2, 0xD3, 0xD7,
0xDF, 0xE3, 0xE5, 0xF5
Bits7-0:
R/W
Bit7
DPL: Data Pointer Low.
The DPL register is the low byte of the 16-bit DPTR. DPTR is used to access indirectly
addressed Flash memory.
R/W
Bit6
Address
0xCC
0xCB
0xCA
0x91
0x95
0x94
0x93
0x92
0xFF
0xE2
0xE1
Table 8.3. Special Function Registers (Continued)
SFR Definition 8.1. DPL: Data Pointer Low Byte
R/W
Bit5
Description
Timer/Counter 2 Low
Timer/Counter 2 Reload High
Timer/Counter 2 Reload Low
Timer/Counter 3Control
Timer/Counter 3 High
Timer/Counter 3Low
Timer/Counter 3 Reload High
Timer/Counter 3 Reload Low
V
Port I/O Crossbar Control 1
Port I/O Crossbar Control 0
Reserved
DD
Monitor Control
R/W
Bit4
Rev. 1.5
R/W
Bit3
R/W
Bit2
R/W
Bit1
R/W
Bit0
SFR Address:
00000000
Reset Value
0x82
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