C8051F705-GQ Silicon Laboratories Inc, C8051F705-GQ Datasheet - Page 198
![IC 8051 MCU 15K FLASH 48-TQFP](/photos/12/17/121724/c8051f705-gq_sml.jpg)
C8051F705-GQ
Manufacturer Part Number
C8051F705-GQ
Description
IC 8051 MCU 15K FLASH 48-TQFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F70xr
Specifications of C8051F705-GQ
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
Cap Sense, POR, PWM, WDT
Number Of I /o
39
Program Memory Size
15KB (15K x 8)
Program Memory Type
FLASH
Eeprom Size
32 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-TQFP, 48-VQFP
Processor Series
C8051F7x
Core
8051
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
I2C, SMBus, SPI, UART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
39
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F700DK
Minimum Operating Temperature
- 40 C
For Use With
336-1635 - DEV KIT FOR C8051F700
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
-
Lead Free Status / Rohs Status
Details
Other names
336-1613
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
C8051F705-GQ
Manufacturer:
TI/NSC
Quantity:
210
Company:
Part Number:
C8051F705-GQ
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
Company:
Part Number:
C8051F705-GQR
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
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C8051F70x/71x
SFR Definition 28.13. P1MDIN: Port 1 Input Mode
SFR Address = 0xF2; SFR Page = F
SFR Definition 28.14. P1MDOUT: Port 1 Output Mode
SFR Address = 0xA5; SFR Page = F
198
Note: On C8051F716 and C8051F717 devices, P1.7 will default to analog mode. If the P1MDIN register is written
Name
Reset
Name
Reset
7:0
7:0 P1MDOUT[7:0] Output Configuration Bits for P1.7–P1.0 (respectively).
Bit
Bit
Type
Type
Bit
Bit
on the C8051F716 and C8051F717 devices, P1.7 should always be configured as analog.
P1MDIN[7:0]
Name
Name
1*
7
7
0
Analog Configuration Bits for P1.7–P1.0 (respectively).
Port pins configured for analog mode have their weak pullup, digital driver, and
digital receiver disabled.
0: Corresponding P1.n pin is configured for analog mode.
1: Corresponding P1.n pin is not configured for analog mode.
These bits are ignored if the corresponding bit in register P1MDIN is logic 0.
0: Corresponding P1.n Output is open-drain.
1: Corresponding P1.n Output is push-pull.
6
1
6
0
5
1
5
0
Rev. 1.0
P1MDOUT[7:0]
4
1
4
0
P1MDIN[7:0]
R/W
R/W
Function
Function
3
1
3
0
2
1
2
0
1
1
1
0
0
1
0
0
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