MC9S08AW48CFDE Freescale Semiconductor, MC9S08AW48CFDE Datasheet - Page 104
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MC9S08AW48CFDE
Manufacturer Part Number
MC9S08AW48CFDE
Description
IC MCU 48K FLASH 48-QFN
Manufacturer
Freescale Semiconductor
Series
HCS08r
Specifications of MC9S08AW48CFDE
Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
38
Program Memory Size
48KB (48K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-QFN
Processor Series
S08AW
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
I2C/SCI/SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
38
Number Of Timers
6
Operating Supply Voltage
- 0.3 V to + 5.8 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
DEMO9S08AW60E
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Package
48QFN EP
Family Name
HCS08
Maximum Speed
40 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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Chapter 6 Parallel Input/Output
6.7.12
In addition to the I/O control, port F pins are controlled by the registers listed below.
104
PTFPE[7:0]
PTFSE[7:0]
Reset
Reset
Field
Field
7:0
7:0
W
W
R
R
PTFPE7
PTFSE7
Port F Pin Control Registers (PTFPE, PTFSE, PTFDS)
Internal Pullup Enable for Port F Bits — Each of these control bits determines if the internal pullup device is
enabled for the associated PTF pin. For port F pins that are configured as outputs, these bits have no effect and
the internal pullup devices are disabled.
0 Internal pullup device disabled for port F bit n.
1 Internal pullup device enabled for port F bit n.
Output Slew Rate Control Enable for Port F Bits — Each of these control bits determine whether output slew
rate control is enabled for the associated PTF pin. For port F pins that are configured as inputs, these bits have
no effect.
0 Output slew rate control disabled for port F bit n.
1 Output slew rate control enabled for port F bit n.
0
0
7
7
Figure 6-37. Output Slew Rate Control Enable for Port F (PTFSE)
PTFPE6
PTFSE6
0
0
6
6
Figure 6-36. Internal Pullup Enable for Port F (PTFPE)
Table 6-29. PTFPE Register Field Descriptions
Table 6-30. PTFSE Register Field Descriptions
PTFPE5
PTFSE5
0
0
5
5
MC9S08AW60 Data Sheet, Rev 2
PTFPE4
PTFSE4
0
0
4
4
Description
Description
PTFPE3
PTFSE3
3
0
3
0
PTFPE2
PTFSE2
0
0
2
2
PTFPE1
PTFSE1
Freescale Semiconductor
0
0
1
1
PTFPE0
PTFSE0
0
0
0
0
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