C8051F411-GM Silicon Laboratories Inc, C8051F411-GM Datasheet - Page 134

IC 8051 MCU 32K FLASH 28QFN

C8051F411-GM

Manufacturer Part Number
C8051F411-GM
Description
IC 8051 MCU 32K FLASH 28QFN
Manufacturer
Silicon Laboratories Inc
Series
C8051F41xr
Datasheets

Specifications of C8051F411-GM

Program Memory Type
FLASH
Program Memory Size
32KB (32K x 8)
Package / Case
28-QFN
Core Processor
8051
Core Size
8-Bit
Speed
50MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
20
Ram Size
2.25K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.25 V
Data Converters
A/D 20x12b; D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
C8051F4x
Core
8051
Data Bus Width
8 bit
Data Ram Size
2368 B
Interface Type
I2C, SMBus, SPI, UART
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
20
Number Of Timers
4
Operating Supply Voltage
2 V to 5.25 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F410DK
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 20 Channel
On-chip Dac
12 bit, 2 Channel
No. Of I/o's
20
Ram Memory Size
2368Byte
Cpu Speed
50MHz
No. Of Timers
4
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
770-1006 - ISP 4PORT FOR SILABS C8051F MCU336-1454 - ADAPTER PROGRAM TOOLSTICK F411336-1317 - KIT EVAL FOR C8051F411336-1314 - KIT DEV FOR C8051F41X
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1309

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C8051F410/1/2/3
Table 15.1. Reset Electrical Characteristics
–40 to +85 °C unless otherwise specified. Typical values are given at 25 ºC.
134
RST Output Low Voltage
RST Input High Voltage
RST Input Low Voltage
RST Input Pullup Impedance
V
V
Missing Clock Detector Timeout
Reset Time Delay
Minimum RST Low Time to Gener-
ate a System Reset
V
V
DD
DD
DD
DD
Monitor Threshold (V
Monitor Threshold (V
Monitor Supply Current
Ramp Time
Parameter
RST-LOW
RST-HIGH
)
)
V
V
V
V
Time from last system clock
rising edge to reset initiation
Delay between release of any
reset source and code execu-
tion at location 0x0000
V
IO
IO
IO
IO
DD
I
I
I
I
OL
OL
OL
OL
= 2.0 V:
= 4.0 V:
= 2.0 V
= 5.0 V
= 0 V to V
= 70 µA
= 8.5 mA
= 70 µA
= 8.5 mA
Conditions
Rev. 1.1
DD
= V
RST
V
0.7 x V
2.25
Min
1.9
50
20
IO
1.95
Typ
150
350
2.3
0.7
70
0.3 x V
Max
2.35
800
400
650
180
2.0
50
40
70
1
IO
Units
mV
k 
µA
ms
µs
µs
µs
V
V
V
V

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