C8051F368-GQ Silicon Laboratories Inc, C8051F368-GQ Datasheet - Page 283

• Manufacturer Part Number: C8051F368-GQ
• Description: IC 8051 MCU 16K FLASH 32-LQFP
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F36xr

Specifications of C8051F368-GQ

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 50MHz
• Connectivity: SMBus (2-Wire/I²C), SPI, UART/USART
• Peripherals: POR, PWM, Temp Sensor, WDT
• Number Of I /o: 29
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 21x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-LQFP
• Processor Series: C8051F3x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: I2C, SMBus, SPI, UART
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 29
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: KSK-SL-TOOLSTICK, PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051F360DK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 21 Channel
• On-chip Dac: 10 bit, 1 Channel
• For Use With: 770-1006 - ISP 4PORT FOR SILABS C8051F MCU336-1410 - KIT DEV FOR C8051F360 FAMILY
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 336-1650

C8051F360/1/2/3/4/5/6/7/8/9
23.2. C2D Port Pin Requirements
Problem
The C2D debugging port pin (shared with P4.6 for C8051F360/3 and P3.0 for C8051F361/2/4/5/6/7/8/9)
behaves differently on "REV A" devices than specified in the data sheet.
On "REV A" devices, a C2D port pin that is pulled low by the associated port pin driver will disrupt debug-
ging capability. In order to communicate with the device through the C2 interface, the value in the port latch
associated C2D port pin must be '1'.
Workaround
To workaround this problem, add a strong pull-up resistor to the C2D port pin to ensure the pin will be high
unless explicitly driven low. Furthermore, the port pin should be left in open-drain mode with a '1' in the
appropriate port latch (PnMDOUT bit = '0', Pn bit = '1') when not in use. This will allow the debugging soft-
ware to transfer data via the C2D pin as often as possible.
This behavior has been corrected on "REV B" of this device.
Rev. 1.0
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