C8051F364-GQ Silicon Laboratories Inc, C8051F364-GQ Datasheet - Page 269
C8051F364-GQ
Manufacturer Part Number
C8051F364-GQ
Description
IC 8051 MCU 32K FLASH 32-LQFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F36xr
Specifications of C8051F364-GQ
Program Memory Type
FLASH
Program Memory Size
32KB (32K x 8)
Package / Case
32-LQFP
Core Processor
8051
Core Size
8-Bit
Speed
100MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
POR, PWM, Temp Sensor, WDT
Number Of I /o
29
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
C8051F3x
Core
8051
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
I2C/SMBus/SPI/UART
Maximum Clock Frequency
100 MHz
Number Of Programmable I/os
29
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
KSK-SL-TOOLSTICK, PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F360DK
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
770-1006 - ISP 4PORT FOR SILABS C8051F MCU336-1410 - KIT DEV FOR C8051F360 FAMILY
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1646
Available stocks
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Price
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Part Number:
C8051F364-GQ
Manufacturer:
Silicon Labs
Quantity:
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Silicon Laboratories Inc
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C8051F364-GQR
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40 000
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Silicon Laboratories Inc
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10 000
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22.2.3. High Speed Output Mode
In High Speed Output mode, a module’s associated CEXn pin is toggled each time a match occurs
between the PCA Counter and the module's 16-bit capture/compare register (PCA0CPHn and
PCA0CPLn) Setting the TOGn, MATn, and ECOMn bits in the PCA0CPMn register enables the High-
Speed Output mode.
Important Note About Capture/Compare Registers: When writing a 16-bit value to the PCA0 Capture/
Compare registers, the low byte should always be written first. Writing to PCA0CPLn clears the ECOMn bit
to ‘0’; writing to PCA0CPHn sets ECOMn to ‘1’.
Note: The initial state of the Toggle output is logic ‘1’ and is initialized to this state when the module enters
High Speed Output Mode.
PCA0CPLn
Write to
Reset
PCA0CPHn
Write to
Figure 22.6. PCA High Speed Output Mode Diagram
0
ENB
ENB
1
PCA
Timebase
Enable
W
P
M
1
6
n
x
E
C
O
M
PCA0CPLn
n
PCA0CPMn
C
A
P
P
n
0 0
PCA0L
C
A
P
N
n
16-bit Comparator
M
A
T
n
O
G
T
n
W
M
P
n
0 x
C
C
E
F
n
PCA0CPHn
PCA0H
C8051F360/1/2/3/4/5/6/7/8/9
Rev. 1.0
Match
Toggle
C
F
C
R
TOGn
0
1
PCA0CN
C
C
F
5
C
C
F
4
0
1
C
C
F
3
CEXn
C
C
F
2
PCA
Interrupt
C
C
F
1
C
C
F
0
Crossbar
Port I/O
269
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