R5F21134DFP#U0 Renesas Electronics America, R5F21134DFP#U0 Datasheet - Page 61
R5F21134DFP#U0
Manufacturer Part Number
R5F21134DFP#U0
Description
IC R8C MCU FLASH 32LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/R8C/Tiny/13r
Datasheets
1.R5F211A2SPU0.pdf
(300 pages)
2.R5F21132FPU0.pdf
(33 pages)
3.R5F21132FPU0.pdf
(226 pages)
4.R5F21134DFPU0.pdf
(224 pages)
Specifications of R5F21134DFP#U0
Core Size
16-Bit
Program Memory Size
16KB (16K x 8)
Oscillator Type
Internal
Core Processor
R8C
Speed
20MHz
Connectivity
SIO, UART/USART
Peripherals
LED, POR, Voltage Detect, WDT
Number Of I /o
22
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Operating Temperature
-40°C ~ 85°C
Package / Case
32-LQFP
No. Of I/o's
22
Eeprom Memory Size
4KB
Ram Memory Size
1024Byte
Cpu Speed
20MHz
No. Of Timers
16
Digital Ic Case
RoHS Compliant
Controller Family/series
R8C/13
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
R0K521134S000BE - KIT EVAL STARTER FOR R8C/13R0E521134EPB00 - KIT EMULATOR PROBE FOR PC7501R0E521134CPE00 - EMULATOR COMPACT R8C/13
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R5F21134DFP#U0R5F21134DFP
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- R5F211A2SPU0 PDF datasheet
- R5F21132FPU0 PDF datasheet #2
- R5F21132FPU0 PDF datasheet #3
- R5F21134DFPU0 PDF datasheet #4
- Current page: 61 of 226
- Download datasheet (3Mb)
R8C/13 Group
Rev.1.20
REJ09B0111-0120
10.1.2 Software Interrupts
A software interrupt occurs when executing certain instructions. Software interrupts are non-
maskable interrupts.
• Undefined Instruction Interrupt
• Overflow Interrupt
• BRK Interrupt
• INT Instruction Interrupt
Jan 27, 2006
An undefined instruction interrupt occurs when executing the UND instruction.
An overflow interrupt occurs when executing the INTO instruction with the O flag set to “1” (the
operation resulted in an overflow). The following are instructions whose O flag changes by arith-
metic:
ABS, ADC, ADCF, ADD, CMP, DIV, DIVU, DIVX, NEG, RMPA, SBB, SHA, SUB
A BRK interrupt occurs when executing the BRK instruction.
An INT instruction interrupt occurs when executing the INT instruction. Software interrupt numbers 0
to 63 can be specified for the INT instruction. Because software interrupt Nos. 4 to 31 are assigned
to peripheral function interrupts, the same interrupt routine as for peripheral function interrupts can
be executed by executing the INT instruction.
In software interrupt numbers 0 to 31, the U flag is saved to the stack during instruction execution
and is cleared to “0” (ISP selected) before executing an interrupt sequence. The U flag is restored
from the stack when returning from the interrupt routine. In software interrupt numbers 32 to 63, the
U flag does not change state during instruction execution, and the SP then selected is used.
page 48 of 205
10.1 Interrupt Overview
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