C8051F360-GQ Silicon Laboratories Inc, C8051F360-GQ Datasheet - Page 5

• Manufacturer Part Number: C8051F360-GQ
• Description: IC 8051 MCU 32K FLASH 48TQFP
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F36xr

Specifications of C8051F360-GQ

• Program Memory Type: FLASH
• Program Memory Size: 32KB (32K x 8)
• Package / Case: 48-TQFP, 48-VQFP
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 100MHz
• Connectivity: EBI/EMI, SMBus (2-Wire/I²C), SPI, UART/USART
• Peripherals: POR, PWM, Temp Sensor, WDT
• Number Of I /o: 39
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 17x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: C8051F3x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: I2C/SMBus/SPI/UART
• Maximum Clock Frequency: 100 MHz
• Number Of Programmable I/os: 39
• Number Of Timers: 4
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: KSK-SL-TOOLSTICK, PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051F360DK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 21-ch x 10-bit
• On-chip Dac: 1-ch x 10-bit
• Package: 48TQFP
• Device Core: 8051
• Family Name: C8051F36x
• Maximum Speed: 100 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 336-1483 - ADAPTER PROGRAM TOOLSTICK F360770-1006 - ISP 4PORT FOR SILABS C8051F MCU336-1412 - BOARD TARGET/PROTO W/C8051F360336-1411 - DAUGHTER CARD TOOLSTCK C8051F362336-1410 - KIT DEV FOR C8051F360 FAMILY
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1407

14. Branch Target Cache ........................................................................................... 145
15. External Data Memory Interface and On-Chip XRAM........................................ 153
16. Oscillators ............................................................................................................. 169
17. Port Input/Output.................................................................................................. 183
18. SMBus ................................................................................................................... 202
13.4.Flash Read Timing ......................................................................................... 143
14.1.Cache and Prefetch Operation ....................................................................... 145
14.2.Cache and Prefetch Optimization................................................................... 146
15.1.Accessing XRAM............................................................................................ 153
15.2.Configuring the External Memory Interface .................................................... 154
15.3.Port Configuration........................................................................................... 154
15.4.Multiplexed and Non-multiplexed Selection.................................................... 157
15.5.Memory Mode Selection................................................................................. 159
15.6.Timing .......................................................................................................... 160
16.1.Programmable Internal High-Frequency (H-F) Oscillator ............................... 169
16.2.Programmable Internal Low-Frequency (L-F) Oscillator ................................ 171
16.3.External Oscillator Drive Circuit...................................................................... 173
16.4.System Clock Selection.................................................................................. 173
16.5.External Crystal Example ............................................................................... 176
16.6.External RC Example ..................................................................................... 177
16.7.External Capacitor Example ........................................................................... 177
16.8.Phase-Locked Loop (PLL).............................................................................. 178
17.1.Priority Crossbar Decoder .............................................................................. 185
17.2.Port I/O Initialization ....................................................................................... 187
17.3.General Purpose Port I/O ............................................................................... 190
18.1.Supporting Documents ................................................................................... 203
18.2.SMBus Configuration...................................................................................... 203
13.3.2.16.4.2 PSWE Maintenance .................................................................... 141
13.3.3.System Clock ......................................................................................... 141
15.1.1.16-Bit MOVX Example ........................................................................... 153
15.1.2.8-Bit MOVX Example ............................................................................. 153
15.4.1.Multiplexed Configuration....................................................................... 157
15.4.2.Non-multiplexed Configuration............................................................... 158
15.5.1.Internal XRAM Only ............................................................................... 159
15.5.2.Split Mode without Bank Select.............................................................. 159
15.5.3.Split Mode with Bank Select................................................................... 160
15.5.4.External Only.......................................................................................... 160
15.6.1.Non-multiplexed Mode ........................................................................... 162
15.6.2.Multiplexed Mode ................................................................................... 165
16.1.1. Internal Oscillator Suspend Mode ......................................................... 170
16.2.1.Calibrating the Internal L-F Oscillator..................................................... 172
16.8.1.PLL Input Clock and Pre-divider ............................................................ 178
16.8.2.PLL Multiplication and Output Clock ...................................................... 178
16.8.3.Powering on and Initializing the PLL ...................................................... 179
C8051F360/1/2/3/4/5/6/7/8/9
Rev. 1.0
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