MC9S08GT60ACBE Freescale Semiconductor, MC9S08GT60ACBE Datasheet - Page 229
![IC MCU 60K FLASH 4K RAM 42-SDIP](/photos/12/18/121859/mc9s08gt60acbe_sml.jpg)
MC9S08GT60ACBE
Manufacturer Part Number
MC9S08GT60ACBE
Description
IC MCU 60K FLASH 4K RAM 42-SDIP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet
1.MC9S08GT60ACFDER.pdf
(302 pages)
Specifications of MC9S08GT60ACBE
Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
33
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
42-DIP (0.600", 15.24mm)
Processor Series
S08GT
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
4 KB
Interface Type
SCI, SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
33
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
EWS08
Development Tools By Supplier
M68EVB908GB60E, M68DEMO908GB60E
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
For Use With
M68DEMO908GB60E - BOARD DEMO MC9S08GB60M68EVB908GB60E - BOARD EVAL FOR MC9S08GB60
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC9S08GT60ACBE
Manufacturer:
TI
Quantity:
922
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In cases where there is no external filtering capacitance, the sampling error is determined by the number
of time constants of charging and the change in input voltage relative to the resolution of the ATD:
The maximum sampling error (assuming maximum change on the input voltage) will be:
In the case where an external filtering capacitance is applied, the sampling error can be reduced based on
the size of the source capacitor (C
source impedance (R
In the case of a 0.1 μF C
However, in the case of repeated conversions at a rate of f
continuous and controlled only by R
This is a worst case sampling error which does not account for R
and C
large C
accuracy specified under the worst case conditions of maximum ΔV
be less than the maximum value of 10 kΩ. The maximum value of 10 kΩ for R
error in the worst case condition of maximum ΔV
Freescale Semiconductor
•
•
•
•
•
+ (ΔV
AIN
AS
ATD input capacitance (C
ATD sample and hold circuit. This capacitance varies with temperature, voltage, and process
variation but a worst case number is necessary to compute worst case sample error.
ATD conversion clock frequency (f
the clock input to the ATD and is dependent on the bus clock frequency and the ATD prescaler.
This frequency determines the width of the sample window, which is 14 ATDCLK cycles.
Input sample frequency (f
frequency that a given input is sampled.
Delta-input sample voltage (ΔV
(intended for conversion) and the previously sampled voltage (which may be from a different
channel). In non-continuous convert mode, this is assumed to be the greater of (V
(V
account for leakage and other losses.
Delta-analog input voltage (ΔV
the input voltage during the last conversion on a given channel. This is based on the slew rate of
the input.
SAMP
AIN
during the sample window. It does illustrate that high values of R
is used and sufficient time to recharge C
– V
/ (V
sampling error in LSB (E
REFL
REFH
# of time constants (τ) = (14 / f
E
E
S
AS
S
= (3.6/3.6) * e
). In continuous convert mode, 5 LSB should be added to the known difference to
= 2
- V
), C
E
AS
S
N
REFL
= 2
, a worst case sampling error of 0.5 LSB is achieved regardless of R
AS
* (ΔV
N
)) * Min[(C
will charge C
* {(ΔV
SAMP
SAMP
AIN
AS
–(14/((7 k + 10 k) * 50 p * 2 M))
) relative to the analog input capacitance (C
AS
AIN
MC9S08GB60A Data Sheet, Rev. 2
– maximum value 50 pF) — This is the internal capacitance of the
/ (V
AIN
SAMP
– see
(not R
AIN
/ (V
REFH
) — This is the difference between the current input voltage and
ATDCLK
S
/ (C
) = 2
REFH
AIN
) — This is the difference between the current input voltage
Appendix A, “Electrical
AIN
– V
AIN
to a value of:
ATDCLK
N
– V
REFL
), and reduces the overall sampling error to:
SAMP
+ C
* (ΔV
AS
– maximum value 2 MHz) — This is the frequency of
REFL
AS
)) * (C
is provided between samples. In order to achieve
) / ((R
and minimum C
)), e
)) * e
SAMP
SAMP
* 1024 = 0.271 LSB
AIN
−(1 / (f
AS
−(1 / (f
, R
/ (V
/ (C
+ R
ATDCLK
AS
AS
SAMP
AIN
AIN
REFH
must re-charge C
recharging the combination of C
SAMP
) * C
+ C
Characteristics”) — This is the
* R
* (R
AS
- V
AS
AS
Analog-to-Digital Converter (S08ATDV3)
AIN
and minimum C
AS
.
))
AS
REFL
* C
)
AS
+ R
AS
(>10 kΩ) are possible if a
AIN
is to ensure low sampling
AIN
)) * e
)
) * C
). Ignoring the analog
AS
−τ
AIN
REFH
. This recharge is
)
]}
AS
– V
, R
AS
Eqn. 14-1
Eqn. 14-2
Eqn. 14-3
Eqn. 14-4
AS
AIN
.
must
) and
AS
229
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