R5F21237DFP#U0 Renesas Electronics America, R5F21237DFP#U0 Datasheet - Page 267
![IC R8C/23 MCU FLASH 48-LQFP](/photos/12/18/121887/r5f21237dfp_u0_sml.jpg)
R5F21237DFP#U0
Manufacturer Part Number
R5F21237DFP#U0
Description
IC R8C/23 MCU FLASH 48-LQFP
Manufacturer
Renesas Electronics America
Series
R8C/2x/23r
Specifications of R5F21237DFP#U0
Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
CAN, I²C, LIN, SIO, SSU, UART/USART
Peripherals
POR, Voltage Detect, WDT
Number Of I /o
41
Program Memory Size
48KB (48K x 8)
Program Memory Type
FLASH
Ram Size
2.5K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
For Use With
RCDK8C - KIT DEV EVAL FOR CAN R8C/23R0K521237S000BE - KIT DEV RSK R8C/23R0E521237CPE00 - EMULATOR COMPACT R8C/20/21/22/23
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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R8C/22 Group, R8C/23 Group
Rev.2.00 Aug 20, 2008
REJ09B0251-0200
Figure 14.97
TSTART0 and TSTART1
bits in TRDSTR register
TRDGRD0 register
TRDGRB0 register
TRDSR1 register
TRDSR0 register
TRDSR0 register
TRDIOB0 output
TRDIOD0 output
TRDIOC0 output
IMFA bit in
IMFB bit in
UDF bit in
Count source
Value in TRDi register
0000h
m + 1
Operating Example of Complementary PWM Mode
CMD0, CMD1: Bits in TRDFCR register
i = 0 or 1
The above applies to the following conditions:
The OLS1 and OLS0 bits in the TRDFCR are set to 0 (initial output level “H”, active level “L” for normal-phase and counter-phase)
1
0
1
0
1
0
1
0
m
n
p
Initial output “H”
Initial output “H”
Page 245 of 501
Transfer (When the CMD1 to CMD0 bits are set to 11b)
Active level “L”
n + 1 - p
n + 1
m + 2 - p
n
n
p
m - p - n + 1
phase active level
(m - p - n + 1) × 2
Width of normal-
Set to 0 by a program
Set to 0 by a program
Dead
time
p
m: Setting Value in TRDGRA0 register
n: Setting Value in TRDGRB0 register
p: Setting Value in TRD0 register
Width of counter-phase active level
Transfer (When the CMD1 to CMD0 bits
Value in TRD0 register
are set to 10b)
n
Value in TRD1 register
Modify with a program
(n + 1 - p) × 2
n + 1 - p
Following data
Set to 0 by a program
FFFFh
Set to
14. Timers
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