MC56F8322MFAE Freescale Semiconductor, MC56F8322MFAE Datasheet - Page 133
![IC DSP 16BIT 60MHZ 48-LQFP](/photos/12/20/122006/mc56f8322mfae_sml.jpg)
MC56F8322MFAE
Manufacturer Part Number
MC56F8322MFAE
Description
IC DSP 16BIT 60MHZ 48-LQFP
Manufacturer
Freescale Semiconductor
Series
56F8xxxr
Datasheet
1.MC56F8122VFAE.pdf
(136 pages)
Specifications of MC56F8322MFAE
Core Processor
56800
Core Size
16-Bit
Speed
60MHz
Connectivity
CAN, SCI, SPI
Peripherals
POR, PWM, Temp Sensor, WDT
Number Of I /o
21
Program Memory Size
40KB (20K x 16)
Program Memory Type
FLASH
Ram Size
6K x 16
Voltage - Supply (vcc/vdd)
2.25 V ~ 3.6 V
Data Converters
A/D 6x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
48-LQFP
Cpu Family
56F8xxx
Device Core Size
16b
Frequency (max)
60MHz
Interface Type
CAN/SCI/SPI
Total Internal Ram Size
4KB
# I/os (max)
21
Number Of Timers - General Purpose
2
Operating Supply Voltage (typ)
2.5/3.3V
Operating Supply Voltage (max)
2.75/3.6V
Operating Supply Voltage (min)
2.25/3V
On-chip Adc
2(3-chx12-bit)
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
48
Package Type
LQFP
Data Bus Width
16 bit
Processor Series
MC56F83xx
Core
56800E
Numeric And Arithmetic Format
Fixed-Point
Device Million Instructions Per Second
40 MIPs
Maximum Clock Frequency
60 MHz
Number Of Programmable I/os
21
Data Ram Size
4 KB
Operating Supply Voltage
- 0.3 V to + 4 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Data Rom Size
8 KB
Minimum Operating Temperature
- 40 C
For Use With
MC56F8323EVME - BOARD EVALUATION MC56F8323
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC56F8322MFAE
Manufacturer:
VISHAY
Quantity:
12 500
Company:
Part Number:
MC56F8322MFAE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MC56F8322MFAE
Manufacturer:
FREESCALE
Quantity:
20 000
12.3 Power Distribution and I/O Ring Implementation
Figure 12-1
contains two internal power regulators. One of them is powered from the V
be turned off. This regulator controls power to the internal clock generation circuitry. The other regulator
is powered from the V
peripherals and the internal memories. This regulator can be turned off, if an external V
is externally applied to the V
In summary, the entire chip can be supplied from a single 3.3 volt supply if the large core regulator is
enabled. If the regulator is not enabled, a dual supply 3.3V/2.5V configuration can also be used.
Notes:
Freescale Semiconductor
Preliminary
•
•
•
•
•
•
OCS
V
Consider all device loads as well as parasitic capacitance due to PCB traces when calculating capacitance.
This is especially critical in systems with higher capacitive loads that could create higher transient currents
in the V
Take special care to minimize noise levels on the V
Because the Flash memory is programmed through the JTAG/EOnCE port, the designer should provide an
interface to this port to allow in-circuit Flash programming
Flash, RAM and internal logic are powered from the core regulator output
V
All circuitry, analog and digital, shares a common V
DDA_OSC_PLL
PP
1 and V
illustrates the general power control incorporated in the 56F8322/56F8122. This chip
DD
and V
PP
REG
2 are not connected in the customer system
DD_IO
SS
circuits.
ROSC
CAP
pins and provides power to all of the internal digital logic of the core, all
pins.
Figure 12-1 Power Management
56F8322 Technical Data, Rev. 16
REG
V
DD
CORE
REF
SS
V
SS
, V
V
bus
CAP
DDA
and V
I/O
Power Distribution and I/O Ring Implementation
SSA
pins
DDA_OSC_PLL
V
V
SSA_ADC
ADC
DDA_ADC
DD_CORE
pin and cannot
V
V
V
V
V
REFH
REFP
REFMID
REFN
REFLO
voltage
133