DF2134AFA20V Renesas Electronics America, DF2134AFA20V Datasheet - Page 19
DF2134AFA20V
Manufacturer Part Number
DF2134AFA20V
Description
IC H8S/2100 MCU FLASH 80QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheets
1.HEWH8E10A.pdf
(19 pages)
2.D12312SVTE25V.pdf
(341 pages)
3.DF2134AFA20V.pdf
(1063 pages)
Specifications of DF2134AFA20V
Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
IrDA, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
58
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
80-QFP
For Use With
3DK2166 - DEV EVAL KIT H8S/2166
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF2134AFA20V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 19 of 1063
- Download datasheet (6Mb)
Section 1 Overview
1.1
1.2
1.3
Section 2 CPU
2.1
2.2
2.3
2.4
2.5
2.6
2.7
2.8
Overview...........................................................................................................................
Internal Block Diagram.....................................................................................................
Pin Arrangement and Functions........................................................................................
1.3.1
1.3.2
1.3.3
Overview........................................................................................................................... 25
2.1.1
2.1.2
2.1.3
2.1.4
CPU Operating Modes ...................................................................................................... 28
Address Space................................................................................................................... 33
Register Configuration...................................................................................................... 34
2.4.1
2.4.2
2.4.3
2.4.4
Data Formats..................................................................................................................... 39
2.5.1
2.5.2
Instruction Set ................................................................................................................... 42
2.6.1
2.6.2
2.6.3
2.6.4
2.6.5
Addressing Modes and Effective Address Calculation ..................................................... 55
2.7.1
2.7.2
Processing States............................................................................................................... 62
2.8.1
2.8.2
2.8.3
2.8.4
Pin Arrangement ..................................................................................................
Pin Functions in Each Operating Mode ............................................................... 11
Pin Functions ....................................................................................................... 18
Features................................................................................................................ 25
Differences between H8S/2600 CPU and H8S/2000 CPU .................................. 26
Differences from H8/300 CPU ............................................................................ 27
Differences from H8/300H CPU.......................................................................... 27
Overview.............................................................................................................. 34
General Registers ................................................................................................. 35
Control Registers ................................................................................................. 36
Initial Register Values.......................................................................................... 38
General Register Data Formats ............................................................................ 39
Memory Data Formats ......................................................................................... 41
Overview.............................................................................................................. 42
Instructions and Addressing Modes ..................................................................... 43
Table of Instructions Classified by Function ....................................................... 44
Basic Instruction Formats .................................................................................... 53
Notes on Use of Bit-Manipulation Instructions ................................................... 54
Addressing Mode................................................................................................. 55
Effective Address Calculation ............................................................................. 58
Overview.............................................................................................................. 62
Reset State............................................................................................................ 63
Exception-Handling State .................................................................................... 64
Program Execution State...................................................................................... 65
...................................................................................................................... 25
.............................................................................................................
Contents
Rev. 4.00 Jun 06, 2006 page xvii of liv
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