MC9S12XEP768CAL Freescale Semiconductor, MC9S12XEP768CAL Datasheet - Page 373

IC MCU 16BIT 768K FLASH 112-LQFP

MC9S12XEP768CAL

Manufacturer Part Number
MC9S12XEP768CAL
Description
IC MCU 16BIT 768K FLASH 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12XEP768CAL

Core Processor
HCS12X
Core Size
16-Bit
Speed
50MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
91
Program Memory Size
768KB (768K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.72 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
Processor Series
S12XE
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
48 KB
Interface Type
CAN/SCI/SPI
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
91
Number Of Timers
25
Operating Supply Voltage
- 0.3 V to + 6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
KIT33812ECUEVME, EVB9S12XEP100, DEMO9S12XEP100
Minimum Operating Temperature
- 40 C
On-chip Adc
16-ch x 12-bit
No. Of I/o's
91
Eeprom Memory Size
4KB
Ram Memory Size
48KB
Cpu Speed
50MHz
No. Of Timers
3
No. Of Pwm Channels
8
Digital Ic Case Style
LQFP
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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10.3.1.14 XGATE Register 2 (XGR2)
The XGR2 register
Module Base +0x00024
Read: In debug mode if unsecured and not idle (XGCHID ≠ 0x00)
Write: In debug mode if unsecured and not idle (XGCHID ≠ 0x00)
10.3.1.15 XGATE Register 3 (XGR3)
The XGR3 register
Module Base +0x00026
Read: In debug mode if unsecured and not idle (XGCHID ≠ 0x00)
Write: In debug mode if unsecured and not idle (XGCHID ≠ 0x00)
Freescale Semiconductor
Reset
Reset
Because of an order from the United States International Trade Commission, BGA-packaged product lines and partnumbers
XGR2[15:0]
XGR3[15:0]
indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010
W
W
R
R
Field
15–0
Field
15–0
15
15
0
0
XGATE Register 2 — The RISC core’s register 2
XGATE Register 3 — The RISC core’s register 3
14
14
0
0
(Figure
(Figure
13
13
0
0
12
12
0
0
10-16) provides access to the RISC core’s register 2.
10-17) provides access to the RISC core’s register 3.
MC9S12XE-Family Reference Manual Rev. 1.23
11
11
Figure 10-16. XGATE Register 2 (XGR2)
Figure 10-17. XGATE Register 3 (XGR3)
0
0
Table 10-16. XGR2 Field Descriptions
Table 10-17. XGR3 Field Descriptions
10
10
0
0
0
0
9
9
0
0
8
8
XGR2
XGR3
Description
Description
0
0
7
7
6
0
6
0
0
0
5
5
0
0
4
4
Chapter 10 XGATE (S12XGATEV3)
0
0
3
3
0
0
2
2
1
0
1
0
0
0
0
0
373

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