M30626FHPFP#U9C Renesas Electronics America, M30626FHPFP#U9C Datasheet - Page 115
M30626FHPFP#U9C
Manufacturer Part Number
M30626FHPFP#U9C
Description
IC M16C MCU FLASH 384K 100QFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/60r
Datasheets
1.QSK-62P_PLUS.pdf
(103 pages)
2.M30622SAFPU5.pdf
(308 pages)
3.M30620SPGPU3C.pdf
(423 pages)
Specifications of M30626FHPFP#U9C
Core Processor
M16C/60
Core Size
16-Bit
Speed
24MHz
Connectivity
I²C, IEBus, UART/USART
Peripherals
DMA, WDT
Number Of I /o
85
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
31K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 26x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
100-QFP
For Use With
867-1000 - KIT QUICK START RENESAS 62PM3062PT3-CPE-3 - EMULATOR COMPACT M16C/62P/30P
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
M30626FHPFP#U9CM30626FHPFP#D3C
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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MULU
[ Syntax ]
[ Operation ]
[ Function ]
[ Selectable src/dest ]
[ Flag Change ]
[ Description Example ]
[ Related Instructions ]
Chapter 3 Functions
*1 If you specify (.B) for the size specifier (.size), you cannot choose A0 or A1 for src and dest simulta-
R0L/R0
A0/A0
dsp:8[A0]
dsp:16[A0] dsp:16[A1]
dsp:20[A0] dsp:20[A1]
R2R0
Change
MULU.size
dest
Flag
• This instruction multiplies src and dest together not including the sign bits and stores the result in dest .
• If you selected (.B) for the size specifier (.size), src and dest both are operated on in 8 bits and the
• If you selected (.W) for the size specifier (.size), src and dest both are operated on in 16 bits and the
MULU.B
MULU.W
MULU.B
MULU.W
neously.
result is stored in 16 bits. If you specified an A0 or A1 for either src or dest , operation is performed on
the 8 low-order bits of A0 or A1.
result is stored in 32 bits. If you specified R0, R1, or A0 for dest , the result is stored in R2R0, R3R1, or
A1A0 accordingly.
*1
U
dest
R0H/R1
A1/A1
dsp:8[A1]
R3R1
I
src,dest
A0,R0L
#3,R0
R0L,R1L
A0,Ram
O
*1
src
B
src
R1L/R2
[A0]
dsp:8[SB]
dsp:16[SB]
abs20
A1A0
S
DIV,DIVU,DIVX,MUL
Z
D
R1H/R3
[A1]
dsp:8[FB] dsp:8[A0]
abs16
#IMM
MULtiple Unsigned
C
Unsigned multiply
B , W
97
R0L/R0
A0/A0
dsp:16[A0] dsp:16[A1] dsp:16[SB] abs16
dsp:20[A0] dsp:20[A1] abs20
R2R0
; R0L and A0’s 8 low-order bits are multiplied.
*1
R0H/R1
A1/A1
dsp:8[A1]
R3R1
[ Instruction Code/Number of Cycles ]
dest
R1L/R2
[A0]
dsp:8[SB]
A1A0
R1H/R3
[A1]
dsp:8[FB]
3.2 Functions
MULU
Page= 207
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