M30626FHPGP#U3C Renesas Electronics America, M30626FHPGP#U3C Datasheet - Page 293
![IC M16C MCU FLASH 384K 100LQFP](/photos/12/21/122189/m30626fhpgp_u3c_sml.jpg)
M30626FHPGP#U3C
Manufacturer Part Number
M30626FHPGP#U3C
Description
IC M16C MCU FLASH 384K 100LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/60r
Datasheets
1.QSK-62P_PLUS.pdf
(103 pages)
2.M30622SAFPU5.pdf
(308 pages)
3.M30620SPGPU3C.pdf
(423 pages)
Specifications of M30626FHPGP#U3C
Core Processor
M16C/60
Core Size
16-Bit
Speed
24MHz
Connectivity
I²C, IEBus, UART/USART
Peripherals
DMA, WDT
Number Of I /o
85
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
31K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 26x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LQFP
For Use With
867-1000 - KIT QUICK START RENESAS 62PR0K33062PS001BE - R0K33062P STARTER KITR0K33062PS000BE - KIT EVAL STARTER FOR M16C/62PM3062PT3-CPE-3 - EMULATOR COMPACT M16C/62P/30P
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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M16C/62P Group (M16C/62P, M16C/62PT)
Rev.2.41
REJ09B0185-0241
Figure 22.4
22.3.1
22.3.2
22.3.3
Flash Identification Register
b7 b6 b5 b4 b3 b2 b1
NOTES :
The microcomputer enters CPU rewrite mode by setting the FMR01 bit in the FMR0 register to “1” (CPU
rewrite mode enabled) and is ready to accept commands. EW0 mode is selected by setting the FMR11 bit in the
FMR1 register to “0”. To set the FMR01 bit to “1”, set to “1” after first writing “0”.
The software commands control programming and erasing. The FMR0 register or the status register indicates
whether a program or erase operation is completed as expected or not.
EW1 mode is selected by setting the FMR11 bit to “1” after the FMR01 bit is set to “1”. (Both bits must be set
to “0” first before setting to “1”.)
The FMR0 register indicates whether or not a program or erase operation has been completed as expected. The
status register cannot be read in EW1 mode.
When an erase/program operation is initiated the CPU halts all program execution until the operation is
completed or erase-suspend is requested.
Figure 22.4 to Figure 22.6 show the FIDR, FMR0 and FMR1 Registers.
1.
This register identifies on-chip flash module type of M16C/62 Group. Note, how ever, no chip version is know n by
this register. Follow the procedure described below for the identification.
Make sure no access to external memories or other SFRs or no interrupts or DMA transfers w ill occur betw een the
above tw o instructions (a) and (b).
Jan 10, 2006
(a) Write “FFh” to FIDR register,
(b) Read FIDR register, and
(c) Check tw o low -order bits of read value.
EW0 Mode
EW1 Mode
Flash memory Control Register (FIDR, FMR0 and FMR1 registers)
FIDR Register
b0
Bit Symbol
(b7-b2)
Symbol
FIDR0
FIDR1
FIDR
Page 276 of 390
—
(1)
Flash Module Type
Identification Value
Nothing is assigned. When w rite, set to “0”.
When read, their contents are indeterminate.
Address
Bit Name
01B4h
b1 b0
0 0 : M16C/62N, M3062GF8N type flash module
1 0 : M16C/62P type flash module
1 1 : M16C/62M, M16C/62A type flash
XXXXXX00b
After Reset
Function
22. Flash Memory Version
RW
RO
RO
—
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