MC56F8366VFVE Freescale Semiconductor, MC56F8366VFVE Datasheet - Page 112

IC DSP 16BIT 60MHZ 144-LQFP

MC56F8366VFVE

Manufacturer Part Number
MC56F8366VFVE
Description
IC DSP 16BIT 60MHZ 144-LQFP
Manufacturer
Freescale Semiconductor
Series
56F8xxxr
Datasheet

Specifications of MC56F8366VFVE

Core Processor
56800
Core Size
16-Bit
Speed
60MHz
Connectivity
CAN, EBI/EMI, SCI, SPI
Peripherals
POR, PWM, Temp Sensor, WDT
Number Of I /o
62
Program Memory Size
544KB (272K x 16)
Program Memory Type
FLASH
Ram Size
18K x 16
Voltage - Supply (vcc/vdd)
2.25 V ~ 3.6 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 105°C
Package / Case
144-LQFP
Data Bus Width
16 bit
Processor Series
MC56F83xx
Core
56800E
Numeric And Arithmetic Format
Fixed-Point
Device Million Instructions Per Second
60 MIPs
Maximum Clock Frequency
60 MHz
Number Of Programmable I/os
62
Data Ram Size
4 KB
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Interface Type
SCI, SPI, CAN
Minimum Operating Temperature
- 40 C
Package
144LQFP
Family Name
56F8xxx
Maximum Speed
60 MHz
Operating Supply Voltage
3.3 V
On-chip Adc
4(4-chx12-bit)
Number Of Timers
16
For Use With
MC56F8367EVME - EVAL BOARD FOR MC56F83X
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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5.6.30.5
This bit field is reserved or not implemented. It is read as 1 and cannot be modified by writing.
5.6.30.6
This read-only bit reflects the state of the external IRQB pin.
5.6.30.7
This read-only bit reflects the state of the external IRQA pin.
5.6.30.8
This bit controls whether the external IRQB interrupt is edge- or level-sensitive. During Stop and Wait
modes, it is automatically level-sensitive.
5.6.30.9
This bit controls whether the external IRQA interrupt is edge- or level-sensitive. During Stop and Wait
modes, it is automatically level -ensitive.
5.6.31
5.6.32
Note: This register is NOT available in the 56F8166 device.
5.6.32.1
This bit field is reserved or not implemented. It is read as 0 and cannot be modified by writing.
112
Base + $1F
RESET
0 = IRQB interrupt is a low-level sensitive (default)
1 = IRQB interrupt is falling-edge sensitive
0 = IRQA interrupt is a low-level sensitive (default)
1 = IRQA interrupt is falling-edge sensitive
Read
Write
Reserved
Interrupt Priority Register 10 (IPR10)
Reserved—Bit 4
IRQB State Pin (IRQB STATE)—Bit 3
IRQA State Pin (IRQA STATE)—Bit 2
IRQB Edge Pin (IRQB Edg)—Bit 1
IRQA Edge Pin (IRQA Edg)—Bit 0
Reserved—Bits 15–8
15
0
0
14
0
0
—Base + $1E
13
0
0
12 11 10
0
1
0
0
56F8366 Technical Data, Rev. 7
0
0
9
0
0
8
0
0
MSGBUF IPL
7
FLECAN2_
0
6
0
5
FLECAN2_
0
WKUP IPL
4
0
3
FLECAN2_
0
ERR IPL
Freescale Semiconductor
2
0
1
FLECAN2_
0
BOFF IPL
Preliminary
0
0

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