HD64F7045F28V Renesas Electronics America, HD64F7045F28V Datasheet - Page 277

IC SH2 MCU FLASH 144QFP

HD64F7045F28V

Manufacturer Part Number
HD64F7045F28V
Description
IC SH2 MCU FLASH 144QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7040r
Datasheets

Specifications of HD64F7045F28V

Core Processor
SH-2
Core Size
32-Bit
Speed
28.7MHz
Connectivity
EBI/EMI, SCI
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
98
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
144-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F7045F28V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
HD64F7045F28V
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
6.1.68
Description: Reads byte data from the address specified by general register Rn, and sets the T bit
to 1 if the data is 0, or clears the T bit to 0 if the data is not 0. Then, data bit 7 is set to 1, and the
data is written to the address specified by Rn. During this operation, the bus is not released.
Operation:
Example:
Format
TAS.B @Rn
TAS(long n)
{
}
_LOOP TAS.B @R7
long temp;
temp=(long)Read_Byte(R[n]);
if (temp==0) T=1;
else T=0;
temp|=0x00000080;
Write_Byte(R[n],temp);
PC+=2;
TAS (Test and Set): Logic Operation Instruction
BF
Abstract
When (Rn) is 0, 1
MSB of (Rn)
/* TAS.B @Rn */
_LOOP
T, 1
; R7 = 1000
; Loops until data in address 1000 is 0
Code
0100nnnn00011011
/* Bus Lock enable */
/* Bus Lock disable */
Rev. 5.00 Jun 30, 2004 page 261 of 512
Cycle
4
Section 6 Instruction Descriptions
T Bit
Test
results
REJ09B0171-0500O
SH-1
Instructions
Applicable
SH-2
SH-
DSP

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