AT89C51CC03C-RDRIM Atmel, AT89C51CC03C-RDRIM Datasheet - Page 87
![IC 8051 MCU FLASH 64K 64VQFP](/photos/6/81/68127/313-64-vqfp_sml.jpg)
AT89C51CC03C-RDRIM
Manufacturer Part Number
AT89C51CC03C-RDRIM
Description
IC 8051 MCU FLASH 64K 64VQFP
Manufacturer
Atmel
Series
AT89C CANr
Datasheets
1.AT89C51CC03C-S3RIM.pdf
(198 pages)
2.AT89C51CC03C-S3RIM.pdf
(32 pages)
3.AT89C51CC03C-S3RIM.pdf
(27 pages)
4.AT89C51CC03C-S3RIM.pdf
(184 pages)
Specifications of AT89C51CC03C-RDRIM
Core Processor
8051
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
36
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
2.25K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
AT89C51CC03CRDRTR
Available stocks
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Manufacturer
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CAN Controller Mailbox
and Registers
Organization
Figure 44. CAN Controller Memory Organization
4182E–CAN–05/04
Enable Interrupt message object - 2
Enable Interrupt message object - 1
Status Interrupt message object - 1
Status Interrupt message object - 2
message object Window SFRs
message object Control and DLC
(message object number) (Data offset)
Enable message object - 2
Enable message object - 1
message object Status
Page message object
TimStmp High
CANTimer Low
Message Data
TimStmp Low
General Interrupt
Enable Interrupt
General Control
CANTimer High
Timer Control
General Status
Bit Timing - 1
Bit Timing - 2
Bit Timing - 3
REC counter
ID Mask - 1
ID Mask - 2
ID Mask - 3
ID Mask - 4
TimTTC High
TimTTC Low
TEC counter
ID Tag - 1
ID Tag - 2
ID Tag - 3
ID Tag - 4
SFR’s
The pagination allows management of the 321 registers including 300(15x20) Bytes of
mailbox via 34 SFR’s.
All actions on the message object window SFRs apply to the corresponding message
object registers pointed by the message object number find in the Page message object
register (CANPAGE) as illustrate in Figure 44.
8 Bytes
message object 0 - Control and DLC
Ch.0 - Message Data - byte 0
message object 0 - Status
Ch.0 TimStmp High
Ch.0 TimStmp Low
Ch.0 - ID Mask - 4
Ch.0 - ID Mask- 1
Ch.0 - ID Mask- 2
Ch.0 - ID Mask- 3
Ch.0 - ID Tag - 1
Ch.0 - ID Tag - 2
Ch.0 - ID Tag - 3
Ch.0 - ID Tag - 4
On-chip CAN Controller registers
15 message objects
message object 14 - Control and DLC
Ch.14 - Message Data - byte 0
message object 14 - Status
Ch.14 TimStmp High
Ch.14 TimStmp Low
Ch.14 - ID Mask - 1
Ch.14 - ID Mask - 2
Ch.14 - ID Mask - 3
Ch.14 - ID Mask - 4
Ch.14 - ID Tag - 4
Ch.14 - ID Tag - 1
Ch.14 - ID Tag - 2
Ch.14 - ID Tag - 3
AT89C51CC03
87
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