MAXQ2000-RAX+ Maxim Integrated Products, MAXQ2000-RAX+ Datasheet - Page 26
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MAXQ2000-RAX+
Manufacturer Part Number
MAXQ2000-RAX+
Description
IC MCU 32K FLASH 68-QFN
Manufacturer
Maxim Integrated Products
Series
MAXQ™r
Datasheet
1.MAXQ2000-RAX.pdf
(39 pages)
Specifications of MAXQ2000-RAX+
Core Processor
RISC
Core Size
16-Bit
Speed
20MHz
Connectivity
1-Wire, SPI, UART/USART
Peripherals
LCD, POR, PWM, WDT
Number Of I /o
50
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 2.75 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
68-QFN Exposed Pad
Processor Series
MAXQ
Core
RISC
Data Bus Width
16 bit
Data Ram Size
2 KB
Interface Type
JTAG, SPI
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
55
Number Of Timers
3
Operating Supply Voltage
2.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Controller Family/series
MAXQ
No. Of I/o's
50
Ram Memory Size
2048Byte
Cpu Speed
20MHz
No. Of Timers
3
Embedded Interface Type
SPI, UART
Rohs Compliant
Yes
Development Tools By Supplier
MAXQ2000-KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
For maximum versatility, the MAXQ2000 generates its
internal system clock from one of five possible sources:
• Internal ring oscillator
• External high-frequency crystal or ceramic resonator,
• External high-frequency clock source
• External 32kHz crystal or ceramic resonator, using an
• External 32kHz clock source
Low-Power LCD Microcontroller
Figure 2. Clock Sources
26
using an internal oscillator
internal oscillator
____________________________________________________________________
POWER-ON
RESET
STOP
CRYSTAL KLL
INPUT
ENABLE
ENABLE
MONITOR
CRYSTAL
CRYSTAL
CRYSTAL
32kHz
RING
HF
System Timing
RESET
CLK INPUT
STARTUP
TIMER
XDOG
POWER-ON RESET
RGMD
XDOG COUNT
MAXQ2000
DIVIDER
CLOCK
WAKE-UP
TIMERS
ALARM
XDOG DONE
SELECTOR
A crystal warmup counter enhances operational relia-
bility. Each time the external crystal oscillation must
restart, such as after exiting Stop mode, the device initi-
ates a crystal warmup period of 65,536 oscillations.
This allows time for the crystal amplitude and frequency
to stabilize before using it as a clock source. While in
the warmup mode, the device can begin operation from
the internal ring oscillator and automatically switch
back to the crystal as soon as it is ready.
RING SELECT
DEFAULT
XDOG DONE
ENABLE
GENERATION
WATCHDOG
CLOCK
TIMER
RESET DOG
RGSL
SYSTEM CLOCK
SWB
INTERRUPT/SERIAL PORT
RESET
STOP
RWT
RESET
WATCHDOG RESET
WATCHDOG INTERRUPT
STOP
POWER-ON
RESET