DS80C310+FCG Maxim Integrated Products, DS80C310+FCG Datasheet - Page 12

IC MCU HI SPEED 25MHZ 44-MQFP

DS80C310+FCG

Manufacturer Part Number
DS80C310+FCG
Description
IC MCU HI SPEED 25MHZ 44-MQFP
Manufacturer
Maxim Integrated Products
Series
80Cr
Datasheet

Specifications of DS80C310+FCG

Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
EBI/EMI, SIO, UART/USART
Peripherals
Brown-out Detect/Reset, POR
Number Of I /o
32
Program Memory Type
ROMless
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
44-MQFP, 44-PQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Figure 2. Typical I
Note 6:
Note 7:
Note 8:
Note 9:
Note 10:
Note 11:
cycles following 1 to 0 transitions, the typical current sink capability of Port 0 and Port 2 is approximately 150A, and the
minimum current sink capability of ALE and PSEN is approximately 400A. On subsequent cycles following 0 to 1
transitions, the typical current drive capability of Port 0 and Port 2 is approximately 110A.
mode.
This is only the current required to hold the low level; transitions from 1 to 0 on an I/O pin must also overcome the transition
current.
2V.
address bus on the DS80C310. Peak current occurs near the input transition point of the latch, approximately 2V.
When addressing external memory. This specification applies to the first clock cycle following the transition. On subsequent
RST = V
During a 0 to 1 transition, a one-shot drives the ports hard for two clock cycles. This measurement reflects port in transition
Current required from external circuit to hold a logic-low level on an I/O pin while the corresponding port latch bit is set to 1.
Ports 1 and 3 source transition current when being pulled down externally. The current reaches its maximum at approximately
0.45 < V
IN
CC
<V
. This condition mimics operation of pins in I/O mode.
CC
CC
. Not a high-impedance input. This port is a weak address holding latch because Port 0 is dedicated as an
vs. Frequency
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DS80C310

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