PIC16C716-20I/P Microchip Technology, PIC16C716-20I/P Datasheet - Page 13

• Manufacturer Part Number: PIC16C716-20I/P
• Description: IC MCU OTP 2KX14 A/D PWM 18DIP
• Manufacturer: Microchip Technology
• Series: PIC® 16Cr

Specifications of PIC16C716-20I/P

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 13
• Program Memory Size: 3.5KB (2K x 14)
• Program Memory Type: OTP
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 4x8b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 18-DIP (0.300", 7.62mm)
• Processor Series: PIC16C
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 128 B
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 13
• Number Of Timers: 3 bit
• Operating Supply Voltage: 2.5 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: ICE2000
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 4 bit
• For Use With: ISPICR1 - ADAPTER IN-CIRCUIT PROGRAMMING309-1059 - ADAPTER 18 ZIF BD W/18SO PLUGSDVA16XP180 - ADAPTER DEVICE FOR MPLAB-ICEAC164010 - MODULE SKT PROMATEII DIP/SOIC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Connectivity: -
• Lead Free Status / Rohs Status: Details

2.2.2
The Special Function Registers are registers used by
the CPU and Peripheral Modules for controlling the
desired operation of the device. These registers are
implemented as static RAM. A list of these registers is
give in Table 2-1.
TABLE 2-1:
© 2005 Microchip Technology Inc.
Legend: x = unknown, u = unchanged, q = value depends on condition, — = unimplemented, read as ‘0’,
Note 1: These registers can be addressed from either bank.
00h
01h
02h
03h
04h
05h
06h
07h
08h-09h
0Ah
0Bh
0Ch
0Dh
0Eh
0Fh
10h
11h
12h
13h-14h
15h
16h
17h
18h-1Dh
1Eh
1Fh
Addr
Bank 0
2: The upper byte of the program counter is not directly accessible. PCLATH is a holding register for PC<12:8> whose contents
3: Other (non Power-up) Resets include: external Reset through MCLR and the Watchdog Timer Reset.
4: The IRP and RP1 bits are reserved. Always maintain these bits clear.
5: On any device Reset, these pins are configured as inputs.
6: This is the value that will be in the port output latch.
7: Reserved bits; Do Not Use.
Shaded locations are unimplemented, read as ‘0’.
are transferred to the upper byte of the program counter.
INDF
TMR0
PCL
STATUS
FSR
PORTA
PORTB
DATACCP
PCLATH
INTCON
PIR1
TMR1L
TMR1H
T1CON
TMR2
T2CON
CCPR1L
CCPR1H
CCP1CON
ADRES
ADCON0
SPECIAL FUNCTION REGISTERS
Name
(1)
(1)
—
—
—
(1)
(5,6)
(5,6)
(1)
(1,2)
(1)
SPECIAL FUNCTION REGISTER SUMMARY
Addressing this location uses contents of FSR to address data memory (not a physical register)
Timer0 Module’s Register
Program Counter’s (PC) Least Significant Byte
Indirect Data Memory Address Pointer
PORTB Data Latch when written: PORTB pins when read
Unimplemented
Unimplemented
Holding Register for the Least Significant Byte of the 16-bit TMR1 Register
Holding Register for the Most Significant Byte of the 16-bit TMR1 Register
Timer2 Module’s Register
Capture/Compare/PWM Register1 (LSB)
Capture/Compare/PWM Register1 (MSB)
Unimplemented
A/D Result Register
ADCS1
IRP
Bit 7
—
GIE
—
—
—
—
—
—
(7)
(4)
TOUTPS3 TOUTPS2
ADCS0
RP1
Bit 6
PEIE
ADIF
—
—
—
—
—
(7)
(4)
T1CKPS1
DC1B1
CHS2
Bit 5
T0IE
RP0
—
—
—
—
(7)
(7)
PORTA Data Latch when written: PORTA pins when read
Write Buffer for the upper 5 bits of the Program Counter
TOUTPS1
T1CKPS0
DC1B0
CHS1
Bit 4
INTE
—
TO
—
(7)
T1OSCEN
TOUTPS0
CCP1M3
The Special Function Registers can be classified into
two sets; core (CPU) and peripheral. Those registers
associated with the core functions are described in
detail in this section. Those related to the operation of
the peripheral features are described in detail in that
peripheral feature section.
CHS0
Bit 3
RBIE
—
PD
—
(7)
GO/DONE
TMR2ON
CCP1M2
T1SYNC
CCP1IF
DCCP
Bit 2
T0IF
Z
PIC16C712/716
T2CKPS1
TMR1CS
CCP1M1
TMR2IF
Bit 1
INTF
—
DC
—
(7)
T2CKPS0 -000 0000 -000 0000
TMR1ON
CCP1M0
TMR1IF
DT1CK
ADON
Bit 0
RBIF
C
DS41106B-page 11
0000 0000 0000 0000
xxxx xxxx uuuu uuuu
0000 0000 0000 0000
rr01 1xxx rr0q quuu
xxxx xxxx uuuu uuuu
--xx xxxx --xu uuuu
xxxx xxxx uuuu uuuu
xxxx xxxx xxxx xuxu
---0 0000 ---0 0000
0000 000x 0000 000u
-0-- 0000 -0-- 0000
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
--00 0000 --uu uuuu
0000 0000 0000 0000
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
--00 0000 --00 0000
xxxx xxxx uuuu uuuu
0000 00-0 0000 00-0
Value on:
POR,
BOR
—
—
—
Resets (4)
Value on
all other
—
—
—