PIC18LF2321-I/SS Microchip Technology, PIC18LF2321-I/SS Datasheet - Page 11
![IC PIC MCU FLASH 4KX16 28SSOP](/photos/6/81/68119/150-28-ssop_sml.jpg)
PIC18LF2321-I/SS
Manufacturer Part Number
PIC18LF2321-I/SS
Description
IC PIC MCU FLASH 4KX16 28SSOP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18F2221-ISO.pdf
(402 pages)
3.PIC18F2221-ISO.pdf
(8 pages)
4.PIC18F2221-ISO.pdf
(30 pages)
5.PIC18F2221-ISO.pdf
(46 pages)
6.PIC18F2321-IML.pdf
(396 pages)
Specifications of PIC18LF2321-I/SS
Core Size
8-Bit
Program Memory Size
8KB (4K x 16)
Core Processor
PIC
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
25
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SSOP
Controller Family/series
PIC18
No. Of I/o's
25
Eeprom Memory Size
256Byte
Ram Memory Size
512Byte
Cpu Speed
40MHz
No. Of Timers
4
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
9. Module: EUSART
REGISTER 18-3:
© 2008 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 5
bit 4
ABDOVF
R/W-0
The descriptions of the RXDTP and TXCKP bits
(BAUDCON<5:4>) are being revised as shown
below (changes in bold).
RXDTP: Data/Receive Polarity Select bit (Asynchronous mode only)
Asynchronous mode:
1 = Receive data (RX) is inverted (active-low)
0 = Receive data (RX) is not inverted (active-high)
TXCKP: Clock and Data Polarity Select bit
Asynchronous mode:
1 = Idle state for transmit (TX) is a low level
0 = Idle state for transmit (TX) is a high level
Synchronous mode:
1 = Idle state for clock (CK) is a high level
0 = Idle state for clock (CK) is a low level
RCIDL
R-1
BAUDCON: BAUD RATE CONTROL REGISTER (EXCERPT)
W = Writable bit
‘1’ = Bit is set
RXDTP
R/W-0
PIC18F2221/2321/4221/4321
TXCKP
R/W-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
BRG16
R/W-0
In this document’s Revision E change, the
Synchronous mode content was removed from the
bit 5 (RXDTP) description.
U-0
—
x = Bit is unknown
R/W-0
WUE
DS80310G-page 11
ABDEN
R/W-0
bit 0