T89C5115-TISUM Atmel, T89C5115-TISUM Datasheet - Page 50

IC 8051 MCU FLASH 16K 28SOIC

T89C5115-TISUM

Manufacturer Part Number
T89C5115-TISUM
Description
IC 8051 MCU FLASH 16K 28SOIC
Manufacturer
Atmel
Series
89Cr
Datasheet

Specifications of T89C5115-TISUM

Core Processor
8051
Core Size
8-Bit
Speed
40MHz
Connectivity
UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
20
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
89C5115-TISUM
Automatic Address
Recognition
Given Address
50
AT89C5115
Figure 22. UART Timing in Mode 1
Figure 23. UART Timing in Modes 2 and 3
The automatic address recognition feature is enabled when the multiprocessor commu-
nication feature is enabled (SM2 bit in SCON register is set).
Implemented in the hardware, automatic address recognition enhances the multiproces-
sor communication feature by allowing the serial port to examine the address of each
incoming command frame. Only when the serial port recognizes its own address will the
receiver set the RI bit in the SCON register to generate an interrupt. This ensures that
the CPU is not interrupted by command frames addressed to other devices.
If necessary, the user can enable the automatic address recognition feature in mode 1.
In this configuration, the stop bit takes the place of the ninth data bit. bit RI is set only
when the received command frame address matches the device’s address and is termi-
nated by a valid stop bit.
To support automatic address recognition, a device is identified by a given address and
a broadcast address.
Note:
Each device has an individual address that is specified in the SADDR register; the
SADEN register is a mask byte that contains don’t-care bits (defined by zeros) to form
the device’s given address. The don’t-care bits provide the flexibility to address one or
more slaves at a time. The following example illustrates how a given address is formed.
To address a device by its individual address, the SADEN mask byte must be 1111
1111b.
For example:
SMOD0 = x
SMOD0 = 1
SMOD0 = 0
SMOD0 = 1
SMOD0 = 1
The multiprocessor communication and automatic address recognition features cannot
be enabled in mode 0 (i.e. setting SM2 bit in SCON register in mode 0 has no effect).
SADDR0101 0110b
SADEN1111 1100b
Given0101 01XXb
RXD
FE
RXD
RI
FE
RI
RI
Start
bit
Start
bit
D0
D0
D1
D1
D2
D2
D3
Data Byte
D3
Data Byte
D4
D4
D5
D5
D6
D6
D7
D7
Stop
bit
Ninth
D8
bit
4128G–8051–02/08
Stop
bit

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