PIC24HJ32GP304-I/ML Microchip Technology, PIC24HJ32GP304-I/ML Datasheet - Page 217
![IC PIC MCU FLASH 32K 44-QFN](/photos/6/81/68122/150-44-qfn_sml.jpg)
PIC24HJ32GP304-I/ML
Manufacturer Part Number
PIC24HJ32GP304-I/ML
Description
IC PIC MCU FLASH 32K 44-QFN
Manufacturer
Microchip Technology
Series
PIC® 24Hr
Datasheets
1.PIC24HJ12GP201-ISO.pdf
(84 pages)
2.PIC24HJ32GP302-ISO.pdf
(368 pages)
3.PIC24HJ32GP302-ISO.pdf
(8 pages)
4.PIC24HJ32GP302-ISO.pdf
(12 pages)
5.PIC24HJ32GP304-EML.pdf
(356 pages)
Specifications of PIC24HJ32GP304-I/ML
Program Memory Type
FLASH
Program Memory Size
32KB (11K x 24)
Package / Case
44-QFN
Core Processor
PIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, PMP, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
35
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 13x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC24HJ
Core
PIC
Data Bus Width
16 bit
Data Ram Size
4 KB
Interface Type
I2C/SPI/UART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
35
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM240001
Minimum Operating Temperature
- 40 C
On-chip Adc
13-ch x 10-bit or 13-ch x 12-bit
Controller Family/series
PIC24
No. Of I/o's
35
Ram Memory Size
4KB
Cpu Speed
40MIPS
No. Of Timers
7
Embedded Interface Type
I2C, SPI, UART
Rohs Compliant
Yes
Height
0.88 mm
Length
8 mm
Supply Voltage (max)
3.6 V, 3.9 V
Supply Voltage (min)
2.7 V, 3 V
Width
8 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
876-1004 - PIC24 BREAKOUT BOARDDM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
- PIC24HJ12GP201-ISO PDF datasheet
- PIC24HJ32GP302-ISO PDF datasheet #2
- PIC24HJ32GP302-ISO PDF datasheet #3
- PIC24HJ32GP302-ISO PDF datasheet #4
- PIC24HJ32GP304-EML PDF datasheet #5
- Current page: 217 of 356
- Download datasheet (6Mb)
19.4
ECAN Message Buffers are part of DMA RAM Memory.
They are not ECAN special function registers. The user
application must directly write into the DMA RAM area
that is configured for ECAN Message Buffers. The
location and size of the buffer area is defined by the
user application.
BUFFER 19-1:
BUFFER 19-2:
© 2009 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-13
bit 12-2
bit 1
bit 0
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-12
bit 11-0
R/W-x
R/W-x
EID13
SID5
U-0
U-0
—
—
ECAN Message Buffers
Unimplemented: Read as ‘0’
SID<10:0>: Standard Identifier bits
SRR: Substitute Remote Request bit
1 = Message will request remote transmission
0 = Normal message
IDE: Extended Identifier bit
1 = Message will transmit extended identifier
0 = Message will transmit standard identifier
Unimplemented: Read as ‘0’
EID<17:6>: Extended Identifier bits
R/W-x
R/W-x
EID12
SID4
U-0
U-0
—
—
ECAN™ MESSAGE BUFFER WORD 0
ECAN™ MESSAGE BUFFER WORD 1
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
R/W-x
R/W-x
EID11
SID3
U-0
U-0
—
—
R/W-x
SID10
R/W-x
R/W-x
EID10
SID2
U-0
Preliminary
—
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-x
R/W-x
R/W-x
EID17
R/W-x
SID9
SID1
EID9
R/W-x
R/W-x
R/W-x
EID16
R/W-x
SID8
EID8
SID0
x = Bit is unknown
x = Bit is unknown
R/W-x
R/W-x
R/W-x
EID15
R/W-x
SID7
EID7
SRR
DS70293D-page 217
R/W-x
R/W-x
R/W-x
EID14
R/W-x
SID6
EID6
IDE
bit 8
bit 0
bit 8
bit 0
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