PIC16LF876A-I/ML Microchip Technology, PIC16LF876A-I/ML Datasheet - Page 223

IC PIC MCU FLASH 8KX14 28QFN

PIC16LF876A-I/ML

Manufacturer Part Number
PIC16LF876A-I/ML
Description
IC PIC MCU FLASH 8KX14 28QFN
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets

Specifications of PIC16LF876A-I/ML

Core Size
8-Bit
Program Memory Size
14KB (8K x 14)
Core Processor
PIC
Speed
10MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
368 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Controller Family/series
PIC16LF
No. Of I/o's
22
Eeprom Memory Size
256Byte
Ram Memory Size
368Byte
Cpu Speed
20MHz
No. Of Timers
3
Package
28QFN EP
Device Core
PIC
Family Name
PIC16
Maximum Speed
20 MHz
Operating Supply Voltage
2.5|3.3|5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
22
Interface Type
I2C/SPI/USART
On-chip Adc
5-chx10-bit
Number Of Timers
3
Processor Series
PIC16LF
Core
PIC
Data Ram Size
368 B
Maximum Clock Frequency
20 MHz
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163022, DV164120
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
Q1462187

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16LF876A-I/ML
Manufacturer:
Microchi
Quantity:
658
Part Number:
PIC16LF876A-I/ML
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
INDEX
A
A/D ................................................................................... 127
A/D Conversion Requirements ......................................... 195
Absolute Maximum Ratings ............................................. 173
ACKSTAT ......................................................................... 101
ADCON0 Register .............................................................. 19
ADCON1 Register .............................................................. 20
Addressable Universal Synchronous Asynchronous
ADRESH Register .............................................................. 19
ADRESL Register .............................................................. 20
Analog-to-Digital Converter. See A/D.
Application Notes
Assembler
Asynchronous Reception
Asynchronous Transmission
B
Banking, Data Memory ................................................. 16, 22
Baud Rate Generator ......................................................... 97
BCLIF ................................................................................. 28
BF ..................................................................................... 101
Block Diagrams
 2003 Microchip Technology Inc.
Acquisition Requirements ........................................ 130
ADCON0 Register .................................................... 127
ADCON1 Register .................................................... 127
ADIF Bit .................................................................... 129
ADRESH Register .................................................... 127
ADRESL Register .................................................... 127
Analog Port Pins .................................................. 49, 51
Associated Registers and Bits ................................. 133
Calculating Acquisition Time .................................... 130
Configuring Analog Port Pins ................................... 131
Configuring the Interrupt .......................................... 129
Configuring the Module ............................................ 129
Conversion Clock ..................................................... 131
Conversions ............................................................. 132
Converter Characteristics ........................................ 194
Effects of a Reset ..................................................... 133
GO/DONE Bit ........................................................... 129
Internal Sampling Switch (Rss) Impedance ............. 130
Operation During Sleep ........................................... 133
Result Registers ....................................................... 132
Source Impedance ................................................... 130
Receiver Transmitter. See USART.
AN552 (Implementing Wake-up
AN556 (Implementing a Table Read) ........................ 30
MPASM Assembler .................................................. 167
Associated Registers ....................................... 118, 120
Associated Registers ............................................... 116
Associated Registers ............................................... 113
A/D ........................................................................... 129
Analog Input Model .......................................... 130, 139
Baud Rate Generator ................................................. 97
Capture Mode Operation ........................................... 65
Comparator I/O Operating Modes ............................ 136
Comparator Output .................................................. 138
Comparator Voltage Reference ............................... 142
Compare Mode Operation ......................................... 66
Crystal/Ceramic Resonator Operation
External Clock Input Operation
on Key Stroke) ................................................... 44
(HS, XT or LP Osc Configuration) .................... 145
(HS, XT or LP Osc Configuration) .................... 145
BOR. See Brown-out Reset.
BRG. See Baud Rate Generator.
BRGH Bit ......................................................................... 113
Brown-out Reset (BOR) .................... 143, 147, 148, 149, 150
Bus Collision During a Repeated Start Condition ............ 108
Bus Collision During a Start Condition ............................. 106
Bus Collision During a Stop Condition ............................. 109
Bus Collision Interrupt Flag bit, BCLIF ............................... 28
C
C Compilers
Capture/Compare/PWM (CCP) ......................................... 63
Interrupt Logic .......................................................... 153
MSSP (I
MSSP (SPI Mode) ..................................................... 71
On-Chip Reset Circuit .............................................. 147
PIC16F873A/PIC16F876A Architecture ...................... 6
PIC16F874A/PIC16F877A Architecture ...................... 7
PORTC
PORTD (in I/O Port Mode) ......................................... 48
PORTD and PORTE (Parallel Slave Port) ................. 51
PORTE (In I/O Port Mode) ......................................... 49
RA3:RA0 Pins ............................................................ 41
RA4/T0CKI Pin .......................................................... 42
RA5 Pin ..................................................................... 42
RB3:RB0 Pins ............................................................ 44
RB7:RB4 Pins ............................................................ 44
RC Oscillator Mode .................................................. 146
Recommended MCLR Circuit .................................. 148
Simplified PWM Mode ............................................... 67
Timer0/WDT Prescaler .............................................. 53
Timer1 ....................................................................... 58
Timer2 ....................................................................... 61
USART Receive ................................................117, 119
USART Transmit ...................................................... 115
Watchdog Timer ...................................................... 155
BOR Status (BOR Bit) ............................................... 29
MPLAB C17 ............................................................. 168
MPLAB C18 ............................................................. 168
MPLAB C30 ............................................................. 168
Associated Registers
Capture Mode ............................................................ 65
CCP Timer Resources ............................................... 63
Compare
Compare Mode .......................................................... 66
Interaction of Two CCP Modules (table) .................... 63
PWM Mode ................................................................ 67
Special Event Trigger and A/D Conversions ............. 66
Peripheral Output Override
Peripheral Output Override (RC4:3) Pins .......... 46
Capture, Compare and Timer1 .......................... 68
PWM and Timer2 ............................................... 69
CCP1IF .............................................................. 65
Prescaler ........................................................... 65
Special Event Trigger Output of CCP1 .............. 66
Special Event Trigger Output of CCP2 .............. 66
Software Interrupt Mode .................................... 66
Special Event Trigger ........................................ 66
Duty Cycle ......................................................... 67
Example Frequencies/Resolutions (table) ......... 68
PWM Period ...................................................... 67
2
C Mode) ...................................................... 80
(RC2:0, RC7:5) Pins .................................. 46
PIC16F87XA
DS39582B-page 221

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