PIC16LF767-I/SS Microchip Technology, PIC16LF767-I/SS Datasheet - Page 141
![IC PIC MCU FLASH 8KX14 28SSOP](/photos/6/81/68119/150-28-ssop_sml.jpg)
PIC16LF767-I/SS
Manufacturer Part Number
PIC16LF767-I/SS
Description
IC PIC MCU FLASH 8KX14 28SSOP
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Specifications of PIC16LF767-I/SS
Core Processor
PIC
Core Size
8-Bit
Speed
10MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
25
Program Memory Size
14KB (8K x 14)
Program Memory Type
FLASH
Ram Size
368 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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When setting up an Asynchronous Transmission,
follow these steps:
1.
2.
3.
4.
FIGURE 11-2:
FIGURE 11-3:
TABLE 11-7:
2004 Microchip Technology Inc.
0Bh, 8Bh,
10Bh,18Bh
0Ch
18h
19h
8Ch
98h
99h
Legend:
Note 1:
Note:
Write to TXREG
BRG Output
(Shift Clock)
RC6/TX/CK (pin)
TXIF bit
(Interrupt Reg. Flag)
TRMT bit
(Transmit Shift
Reg. Empty Flag)
Address
Write to TXREG
BRG Output
(Shift Clock)
RC6/TX/CK (pin)
TXIF bit
(Transmit Buffer
Reg. Empty Flag)
TRMT bit
(Transmit Shift
Reg. Empty Flag)
Initialize the SPBRG register for the appropriate
baud rate. If a high-speed baud rate is desired,
set bit BRGH (see Section 11.1 “AUSART
Baud Rate Generator (BRG)”).
Enable the asynchronous serial port by clearing
bit SYNC and setting bit SPEN.
If interrupts are desired, then set enable bit TXIE.
If 9-bit transmission is desired, then set transmit
bit TX9.
This timing diagram shows two consecutive transmissions.
x = unknown, — = unimplemented locations read as ‘0’. Shaded cells are not used for asynchronous transmission.
Bits PSPIE and PSPIF are reserved on 28-pin devices; always maintain these bits clear.
INTCON
PIR1
RCSTA
TXREG AUSART Transmit Data Register
PIE1
TXSTA
SPBRG Baud Rate Generator Register
Name
REGISTERS ASSOCIATED WITH ASYNCHRONOUS TRANSMISSION
PSPIE
PSPIF
CSRC
SPEN
ASYNCHRONOUS MASTER TRANSMISSION
ASYNCHRONOUS MASTER TRANSMISSION (BACK TO BACK)
Bit 7
GIE
Word 1
Transmit Shift Reg.
Word 1
Transmit Shift Reg
Word 1
(1)
(1)
Word 1
ADIE
PEIE
ADIF
Bit 6
RX9
TX9
Start bit
Start bit
Word 2
TMR0IE INT0IE
SREN
TXEN
RCIF
RCIE
Bit 5
CREN
SYNC
bit 0
Bit 4
TXIF
TXIE
bit 0
ADDEN
SSPIE
SSPIF
RBIE
Bit 3
—
bit 1
Word 1
bit 1
Word 1
5.
6.
7.
8.
TMR0IF
CCP1IF
CCP1IE TMR2IE
BRGH
FERR
Bit 2
Enable the transmission by setting bit TXEN
which will also set bit TXIF.
If 9-bit transmission is selected, the ninth bit
should be loaded in bit TX9D.
Load data to the TXREG register (starts
transmission).
If using interrupts, ensure that GIE and PEIE
(bits 7 and 6) of the INTCON register are set.
TMR2IF
INT0IF
OERR
TRMT
Bit 1
bit 7/8
Word 2
Transmit Shift Reg.
bit 7/8
TMR1IE
TMR1IF
RX9D
TX9D
RBIF
Bit 0
Stop bit
PIC16F7X7
Stop bit
0000 000x
0000 0000
0000 000x
0000 0000
0000 0000
0000 -010
0000 0000
POR, BOR
Value on:
Start bit
DS30498C-page 139
Word 2
0000 000u
0000 0000
0000 000x
0000 0000
0000 0000
0000 -010
0000 0000
Value on
all other
Resets
bit 0
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