PIC16F874-20I/P Microchip Technology, PIC16F874-20I/P Datasheet - Page 63
![IC MCU FLASH 4KX14 EE 40DIP](/photos/6/61/66192/150-40-dip_sml.jpg)
PIC16F874-20I/P
Manufacturer Part Number
PIC16F874-20I/P
Description
IC MCU FLASH 4KX14 EE 40DIP
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F688T-ISL.pdf
(688 pages)
3.PIC16F873-04SO.pdf
(218 pages)
4.PIC16F873-04SO.pdf
(5 pages)
5.PIC16F873-04SO.pdf
(5 pages)
Specifications of PIC16F874-20I/P
Program Memory Type
FLASH
Program Memory Size
7KB (4K x 14)
Package / Case
40-DIP (0.600", 15.24mm)
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
33
Eeprom Size
128 x 8
Ram Size
192 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
192 B
Interface Type
MSSP/PSP/USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
33
Number Of Timers
3
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163022, DV164120
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Data Rom Size
128 B
Height
3.81 mm
Length
52.26 mm
Supply Voltage (max)
5.5 V
Supply Voltage (min)
4 V
Width
13.84 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
444-1001 - DEMO BOARD FOR PICMICRO MCU
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC16F874-20I/P
Manufacturer:
AVX
Quantity:
40 000
Company:
Part Number:
PIC16F874-20I/PQ
Manufacturer:
IDT
Quantity:
1 145
Company:
Part Number:
PIC16F874-20I/PQ
Manufacturer:
Microchip Technology
Quantity:
10 000
Company:
Part Number:
PIC16F874-20I/PT
Manufacturer:
MICROCHIP
Quantity:
334
Company:
Part Number:
PIC16F874-20I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
8.3
In Pulse Width Modulation mode, the CCPx pin pro-
duces up to a 10-bit resolution PWM output. Since the
CCP1 pin is multiplexed with the PORTC data latch,
the TRISC<2> bit must be cleared to make the CCP1
pin an output.
Figure 8-3 shows a simplified block diagram of the
CCP module in PWM mode.
For a step-by-step procedure on how to set up the CCP
module for PWM operation, see Section 8.3.3.
FIGURE 8-3:
A PWM output (Figure 8-4) has a time-base (period)
and a time that the output stays high (duty cycle). The
frequency of the PWM is the inverse of the period
(1/period).
FIGURE 8-4:
Note:
2001 Microchip Technology Inc.
Note 1: The 8-bit timer is concatenated with 2-bit internal Q
CCPR1H (Slave)
Comparator
CCPR1L
TMR2 = PR2
Duty Cycle Registers
TMR2
PR2
Comparator
PWM Mode (PWM)
Duty Cycle
clock, or 2 bits of the prescaler, to create 10-bit time-
base.
Clearing the CCP1CON register will force
the CCP1 PWM output latch to the default
low level. This is not the PORTC I/O data
latch.
Period
(Note 1)
TMR2 = Duty Cycle
Clear Timer,
CCP1 pin and
latch D.C.
SIMPLIFIED PWM BLOCK
DIAGRAM
PWM OUTPUT
TMR2 = PR2
CCP1CON<5:4>
R
S
Q
TRISC<2>
RC2/CCP1
8.3.1
The PWM period is specified by writing to the PR2 reg-
ister. The PWM period can be calculated using the fol-
lowing formula:
PWM frequency is defined as 1 / [PWM period].
When TMR2 is equal to PR2, the following three events
occur on the next increment cycle:
• TMR2 is cleared
• The CCP1 pin is set (exception: if PWM duty
• The PWM duty cycle is latched from CCPR1L into
8.3.2
The PWM duty cycle is specified by writing to the
CCPR1L register and to the CCP1CON<5:4> bits. Up
to 10-bit resolution is available. The CCPR1L contains
the eight MSbs and the CCP1CON<5:4> contains the
two LSbs. This 10-bit value is represented by
CCPR1L:CCP1CON<5:4>. The following equation is
used to calculate the PWM duty cycle in time:
CCPR1L and CCP1CON<5:4> can be written to at any
time, but the duty cycle value is not latched into
CCPR1H until after a match between PR2 and TMR2
occurs (i.e., the period is complete). In PWM mode,
CCPR1H is a read-only register.
The CCPR1H register and a 2-bit internal latch are
used to double buffer the PWM duty cycle. This double
buffering is essential for glitch-free PWM operation.
When the CCPR1H and 2-bit latch match TMR2, con-
catenated with an internal 2-bit Q clock, or 2 bits of the
TMR2 prescaler, the CCP1 pin is cleared.
The maximum PWM resolution (bits) for a given PWM
frequency is given by the formula:
cycle = 0%, the CCP1 pin will not be set)
CCPR1H
Note:
Note:
PWM duty cycle =(CCPR1L:CCP1CON<5:4>) •
PWM period = [(PR2) + 1] • 4 • T
Resolution
The Timer2 postscaler (see Section 7.1) is
not used in the determination of the PWM
frequency. The postscaler could be used
to have a servo update rate at a different
frequency than the PWM output.
If the PWM duty cycle value is longer than
the PWM period, the CCP1 pin will not be
cleared.
PWM PERIOD
PWM DUTY CYCLE
(TMR2 prescale value)
T
=
OSC
• (TMR2 prescale value)
log
PIC16F87X
(
log(2)
F
F
PWM
OSC
OSC
)
DS30292C-page 61
•
bits