PIC14000-04/SS Microchip Technology, PIC14000-04/SS Datasheet - Page 46

• Manufacturer Part Number: PIC14000-04/SS
• Description: IC MCU OTP 4KX14 A/D 28SSOP
• Manufacturer: Microchip Technology
• Series: PIC® 14r

Specifications of PIC14000-04/SS

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 4MHz
• Connectivity: I²C
• Peripherals: POR, Temp Sensor, WDT
• Number Of I /o: 20
• Program Memory Size: 7KB (4K x 14)
• Program Memory Type: OTP
• Ram Size: 192 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 6 V
• Data Converters: Slope A/D
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 28-SSOP
• Processor Series: PIC14000
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 192 B
• Interface Type: SPI, UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 22
• Number Of Timers: 1
• Operating Supply Voltage: 2.7 V to 6 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: ICE2000
• Minimum Operating Temperature: 0 C
• On-chip Adc: 14 bit
• For Use With: 309-1025 - ADAPTER 28-SSOP TO 28-DIPXLT28SS-1 - SOCKET TRANSITION ICE 28SSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

PIC14000
When a master does not wish to relinquish the bus (by
generating a STOP condition), a repeated START (Sr)
must be generated. This condition is identical to the
START (SDA goes high-to-low while SCL is high), but
occurs after a data transfer acknowledge pulse (not the
FIGURE 7-8:
FIGURE 7-9:
FIGURE 7-10: COMBINED FORMAT
DS40122B-page 46
For 7-bit address:
A master transmitter addresses a slave receiver with a
7-bit address. The transfer direction is not changed.
S Slave Address R/W A DATA A DATA A/A P
For 7-bit address:
A master reads a slave immediately after the first byte.
S Slave Address R/W A DATA A DATA
Combined Format:
Transfer direction of data and acknowledgement bits depends on R/W bits.
S Slave Address
Combined format -
From master to slave
From slave to master
S Slave Address R/W A DATA A/A
From master to slave
From slave to master
From master to slave
From slave to master
first 7 bits
"0" (write)
(write)
(read)
MASTER - TRANSMITTER SEQUENCE
MASTER - RECEIVER SEQUENCE
R/W A Slave Address
(read)
A master addresses a slave with a 10-bit address, then transmits
data to this slave and reads data from this slave.
(n bytes - acknowledge)
(n bytes - acknowledge)
A = acknowledge (SDA low)
A = not acknowledge (SDA high)
S = START condition
P = STOP condition
second byte
A = acknowledge (SDA low)
A = not acknowledge (SDA high)
S = START condition
P = STOP condition
data transferred
data transferred
A = acknowledge (SDA low)
A = not acknowledge (SDA high)
S = START condition
P = STOP condition
(read or write)
(n bytes + acknowledge)
Sr = repeated
START condition
A
Sr Slave Address R/W A DATA A/A P
Data A
A
Preliminary
P
(write)
Data A/A
A master transmitter addresses a slave receiver with a
10-bit address.
bus-free state). This allows a master to send
“commands” to the slave and then receive the
requested information or to address a different slave
device. This sequence is shown in Figure 7-10.
For 10-bit address:
S Slave Address
S Slave Address
For 10-bit address:
A master transmitter addresses a slave receiver with a
10-bit address.
Sr Slave Address
Sr Slave Address
first 7 bits
first 7 bits
Direction of transfer
may change at this point
first 7 bits
first 7 bits
(write)
(write)
Data A
(read)
(read)
R/W A1 Slave Address
R/W A1 Slave Address
R/W A Data A
R/W A3 Data A
Data
second byte
second byte
1996 Microchip Technology Inc.
A/A
P
A2
A2
Data
Data
A
A
P
P