EP9301-CQZ Cirrus Logic Inc, EP9301-CQZ Datasheet - Page 10

• Manufacturer Part Number: EP9301-CQZ
• Description: IC ARM9 SOC PROCESSOR 208LQFP
• Manufacturer: Cirrus Logic Inc
• Series: EP9r

Specifications of EP9301-CQZ

• Core Size: 16/32-Bit
• Peripherals: AC'97, DMA, I&sup2:S, LED, MaverickKey, POR, PWM, WDT
• Core Processor: ARM9
• Speed: 166MHz
• Connectivity: EBI/EMI, Ethernet, I²C, IrDA, SPI, UART/USART, USB
• Number Of I /o: 19
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 3.6 V
• Data Converters: A/D 5x12b
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 208-TQFP, 208-VQFP
• Controller Family/series: (ARM9)
• No. Of I/o's: 19
• Ram Memory Size: 16MB
• Cpu Speed: 166MHz
• No. Of Timers: 4
• Digital Ic Case Style: TQFP
• Embedded Interface Type: SPI
• Rohs Compliant: Yes
• Processor Series: EP93xx
• Core: ARM920T
• Data Bus Width: 32 bit
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 598-1136

EP9301
Entry Level ARM9 System-on-Chip Processor
Reset and Power Management
The chip may be reset through the PRSTn pin or through
the open drain common reset pin, RSTOn.
Clocks are managed on a peripheral-by-peripheral basis
and may be turned off to conserve power.
The processor clock is dynamically adjustable from 0 to
166 MHz.
Hardware Debug Interface
The JTAG interface allows use of ARM’s Multi-ICE or
other in-circuit emulators.
10
PRSTn
RSTOn
TCK
TDI
TDO
TMS
TRSTn
Pin Mnemonic
Pin Mnemonic
Table N. Reset and Power Management Pin Assignments
Table O. Hardware Debug Interface
Power On Reset
User Reset In/Out – Open Drain –
Preserves Real Time Clock value
JTAG Clock
JTAG Data In
JTAG Data Out
JTAG Test Mode Select
JTAG Port Reset
Pin Name - Description
Pin Name - Description

Copyright 2010 Cirrus Logic (All Rights Reserved)
12-channel DMA Controller
The DMA module contains 12 separate DMA channels.
Ten of these may be used for peripheral-to-memory or
memory-to-peripheral
dedicated to memory-to-memory transfers. Each DMA
channel is connected to the 16-bit DMA request bus.
The request bus is a collection of requests, Serial Audio
and UARTs. Each DMA channel can be used
independently or dedicated to any request signal. For
each DMA channel, source and destination addressing
can be independently programmed to increment,
decrement, or stay at the same value. All DMA
addresses are physical, not virtual addresses.
Internal Boot ROM
The Internal 16 kbyte ROM allows booting from FLASH
memory, SPI or UART. Consult the EP93xx User’s
Manual for operational details.
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