EP9302-CQZ Cirrus Logic Inc, EP9302-CQZ Datasheet

IC ARM9 SOC PROCESSOR 208LQFP

EP9302-CQZ

Manufacturer Part Number
EP9302-CQZ
Description
IC ARM9 SOC PROCESSOR 208LQFP
Manufacturer
Cirrus Logic Inc
Series
EP9r
Datasheets

Specifications of EP9302-CQZ

Program Memory Type
ROMless
Package / Case
208-LQFP
Core Processor
ARM9
Core Size
16/32-Bit
Speed
200MHz
Connectivity
EBI/EMI, Ethernet, I²C, IrDA, SPI, UART/USART, USB
Peripherals
AC'97, DMA, I&sup2:S, LED, MaverickKey, POR, PWM, WDT
Number Of I /o
19
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 3.6 V
Data Converters
A/D 5x12b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Processor Series
EP93xx
Core
ARM920T
Data Bus Width
32 bit
Data Ram Size
16 bit
Interface Type
USB, USART, SPI
Maximum Clock Frequency
200 MHz
Number Of Programmable I/os
37
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
EDB9302A-Z
Controller Family/series
(ARM9)
No. Of I/o's
19
Ram Memory Size
16MB
Cpu Speed
200MHz
No. Of Timers
4
Embedded Interface Type
AC97, I2S, SPI, UART, USB
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
598-1132 - KIT DEVELOPMENT EP9302 ARM9
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
598-1137

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EP9302-CQZ
Manufacturer:
Cirrus
Quantity:
3 295
Part Number:
EP9302-CQZ
Manufacturer:
ALTERA
Quantity:
672
Part Number:
EP9302-CQZ
Manufacturer:
Cirrus Logic Inc
Quantity:
10 000
Part Number:
EP9302-CQZ
Manufacturer:
ALTERA
0
Part Number:
EP9302-CQZ
Manufacturer:
CYPRESS/赛普拉斯
Quantity:
20 000
Company:
Part Number:
EP9302-CQZ
Quantity:
3 600
Company:
Part Number:
EP9302-CQZ
Quantity:
640
FEATURES
http://www.cirrus.com
200 MHz ARM920T Processor
MaverickCrunch
MaverickKey
Integrated Peripheral Interfaces
16 Kbyte Instruction Cache
16 Kbyte Data Cache
Linux
100 MHz System Bus
Floating point, integer and signal processing
instructions
Optimized for digital music compression and
decompression algorithms
Hardware interlocks allow in-line coding
32-bit unique ID can be used for DRM compliance
128-bit random ID
16-bit SDRAM Interface up to 4 banks
16-bit SRAM / FLASH / ROM
Serial EEPROM Interface
1/10/100 Mbps Ethernet MAC
Two UARTs
Two-port USB 2.0 Full Speed Host (OHCI)
(12 Mbits per second)
IrDA Interface
ADC
Serial Peripheral Interface (SPI) Port
®
, Microsoft
(2) UARTs
Interface
Ethernet
(2) USB
IDs
Serial
Audio
Hosts
MAC
IrDA
w/
Math Engine
®
Windows
Processor Bus
©
®
Peripheral Bus
Copyright 2004 Cirrus Logic (All Rights Reserved)
CE enabled MMU
12 Channel DMA
MaverickKey
MEMORY AND STORAGE
Boot
ROM
TM
D-Cache
MaverickCrunch
16KB
Flash I/F
SRAM &
High Speed ARM9 System-
ARM920T
Internal Peripherals
Package
MMU
on-Chip Processor with
6-channel Serial Audio Interface (I
2-channel low-cost Serial Audio Interface (AC'97)
12 Direct Memory Access (DMA) Channels
Real-time Clock with software Trim
Dual PLL controls all clock domains
Watchdog Timer
Two general purpose 16-bit timers
One general purpose 32-bit timer
One 40-bit Debug Timer
Interrupt Controller
Boot ROM
208-pin LQFP
I-Cache
16KB
MaverickCrunch
TM
SDRAM I/F
Unified
Bus Bridge
EP9302 Data Sheet
Interrupts
Clocks &
Timers
& GPIO
2
S)
DS653PP2
JUL ‘04
1

Related parts for EP9302-CQZ

EP9302-CQZ Summary of contents

Page 1

... Boot ROM Flash I/F MEMORY AND STORAGE © Copyright 2004 Cirrus Logic (All Rights Reserved) EP9302 Data Sheet MaverickCrunch 6-channel Serial Audio Interface (I 2-channel low-cost Serial Audio Interface (AC'97) 12 Direct Memory Access (DMA) Channels Real-time Clock with software Trim Dual PLL controls all clock domains ...

Page 2

... GPS & fleet management systems • Educational toys • Industrial computers • Industrial hand-held devices • Voting machines • Medical equipment The EP9302 is one of a series of ARM920T-based devices. Other members of the family have different peripheral sets, coprocessors configurations. Revision Date 1 June 2004 Initial Release. ...

Page 3

... Ethernet MAC Interface ............................................................................................ 26 Audio Interface ........................................................................................................... 28 AC’97 ...................................................................................................................... 31 ADC ........................................................................................................................... 32 JTAG .......................................................................................................................... 33 208 Pin LQFP Package Outline .....................................................................34 208 Pin LQFP Pinout ................................................................................................. 35 Acronyms and Abbreviations ........................................................................39 Units of Measurement .....................................................................................39 ORDERING INFORMATION ............................................................................40 DS653PP2 High Speed ARM9 System-on-Chip Processor with MaverickCrunch Copyright 2004 Cirrus Logic (All Rights Reserved) EP9302 3 ...

Page 4

... EP9302 High Speed ARM9 System-on-Chip Processor with MaverickCrunch List of Figures Figure 1. Timing Diagram Drawing Key ................................................................................. 13 Figure 2. SDRAM Load Mode Register Cycle Timing Measurement ..................................... 14 Figure 3. SDRAM Burst Read Cycle Timing Measurement ................................................... 15 Figure 4. SDRAM Burst Write Cycle Timing Measurement ................................................... 16 Figure 5. SDRAM Auto Refresh Cycle Timing Measurement ................................................ 17 Figure 6 ...

Page 5

... Table N. Reset and Power Management Pin Assignments ................................................... 10 Table O. Hardware Debug Interface ...................................................................................... 10 Table P. Pin List in Numerical Order by Pin Number ............................................................. 36 Table Q. Pin Descriptions ..................................................................................................... 37 Table R. Pin Multiplex Usage Information .............................................................................. 38 DS653PP2 High Speed ARM9 System-on-Chip Processor with MaverickCrunch Copyright 2004 Cirrus Logic (All Rights Reserved) EP9302 5 ...

Page 6

... EP9302 through the use of laser probing technology. These IDs can then be used to match secure copyrighted content with the ID of the target device the EP9302 is powering, and then deliver the copyrighted information over a secure connection. In addition, secure transactions can benefit by also matching device IDs to server IDs. MaverickKey IDs provide a level of hardware security required for today’ ...

Page 7

... Clock AC'97 Serial Input I2S Serial Input AC'97 Serial Output I2S Serial Output battery measurement bb Pin Description External Analog Measurement Input External Analog Measurement Input External Analog Measurement Input External Analog Measurement Input External Analog Measurement Input EP9302 S on AC'97 Mode 7 ...

Page 8

... EP9302 High Speed ARM9 System-on-Chip Processor with MaverickCrunch Universal Asynchronous Receiver/Transmitters (UARTs) Two 16550-compatible UARTs are supplied. One provides asynchronous HDLC (High-level Data Link Control) protocol support for full duplex transmit and receive. The HDLC receiver handles framing, address matching, CRC checking, control-octet transparency, and optionally passes the CRC to the host at the end of the packet ...

Page 9

... INT[2] is not bonded out. Table L. Dual LED Pin Assignments Pin Name - Alternative Usage Description Green LED General Purpose I/O Red LED General Purpose I/O Pin Name - Description Expanded General Purpose Input / Output Pins with Interrupts Expanded General Purpose Input / Output Pins with Interrupts EP9302 9 ...

Page 10

... EP9302 High Speed ARM9 System-on-Chip Processor with MaverickCrunch Reset and Power Management The chip may be reset through the PRSTn pin or through the open drain common reset pin, RSTOn. Clocks are managed on a peripheral-by-peripheral basis and may be turned off to conserve power. The processor clock is dynamically adjustable from 0 to 200 MHz (184 MHz for industrial conditions) ...

Page 11

... VDD_PLL - 2.16 VDD_ADC - 3. ±10 - ±50 -0.3 RVDD+0.3 -40 +125 Conditions”, below. Min Typ Max 3.0 3.3 3.6 1.65 1.80 1.94 1.65 1.80 1.94 3.0 3.3 3 +25 + -40 +25 + 200 - - 184 - - 100 - - 92 EP9302 Unit °C Unit °C °C MHz MHz MHz MHz 11 ...

Page 12

... EP9302 High Speed ARM9 System-on-Chip Processor with MaverickCrunch DC Characteristics ( 70° C; CVDD = VDD_PLL = 1.8; RVDD = 3 All grounds = 0 V; all voltages with respect unless otherwise noted) Parameter High level output voltage Iout = -4 mA Low level output voltage Iout = 4 mA High level input voltage ...

Page 13

... MHz and 100 MHz (92 MHz for industrial conditions). DS653PP2 High Speed ARM9 System-on-Chip Processor with MaverickCrunch Clock High to Low High/Low to High Bus Change Bus Valid Undefined/Invalid Bus/Signal Omission Figure 1. Timing Diagram Drawing Key Copyright 2004 Cirrus Logic (All Rights Reserved) EP9302 13 ...

Page 14

... EP9302 High Speed ARM9 System-on-Chip Processor with MaverickCrunch Memory Interface Figure 2 through Figure 5 define the timings associated with all phases of the SDRAM. The following table contains the values for the timings of each of the SDRAM modes. Parameter SDCLK high time SDCLK low time ...

Page 15

... SDRAM Burst Read Cycle SDCLK t d SDCSn RASn CASn SDWEn t DQd DQMn DS653PP2 High Speed ARM9 System-on-Chip Processor with MaverickCrunch t clk_low DAs DAh Figure 3. SDRAM Burst Read Cycle Timing Measurement Copyright 2004 Cirrus Logic (All Rights Reserved) EP9302 t clk_high t clkrf t DQh 15 ...

Page 16

... EP9302 High Speed ARM9 System-on-Chip Processor with MaverickCrunch SDRAM Burst Write Cycle SDCLK t d SDCSn RASn CASn SDWEn DQMn clk_low t h Figure 4. SDRAM Burst Write Cycle Timing Measurement Copyright 2004 Cirrus Logic (All Rights Reserved) t clk_high t clkrf t h DS653PP2 ...

Page 17

... Note: Chip select shown as bus to illustrate multiple devices being put into auto refresh in one access Figure 5. SDRAM Auto Refresh Cycle Timing Measurement DS653PP2 High Speed ARM9 System-on-Chip Processor with MaverickCrunch t clk_low Copyright 2004 Cirrus Logic (All Rights Reserved) t clk_high t clkrf EP9302 17 ...

Page 18

... EP9302 High Speed ARM9 System-on-Chip Processor with MaverickCrunch Static Memory 32-bit Read on 8-bit External Bus Parameter AD setup to RDn assert time RDn assert to Address 1 transition time Address 2 assert time Address 3 assert time AD transition to RDn deassert time AD hold from RDn deassert time RDn assert time ...

Page 19

... ADd t - ADh t - CSh t - WRd t - WRpwL t - WRpwH t - DQMd t - DQMpwL t - DQMpwH t - DAh pwL pwH Copyright 2004 Cirrus Logic (All Rights Reserved) Typ Max t - HCLK t - HCLK × HCLK t - HCLK 0 - × (WST1 + HCLK × HCLK 0 - × (WST1 + HCLK × HCLK t - HCLK pwH pwL EP9302 Unit ...

Page 20

... EP9302 High Speed ARM9 System-on-Chip Processor with MaverickCrunch Static Memory 32-bit Read on 16-bit External Bus Parameter AD setup to RDn assert time RDn assert to AD transition time AD transition to RDn deassert time AD hold from RDn deassert time RDn assert time CSn to RDn assert delay time ...

Page 21

... DAh2 t ADd t WRpwL t WRpwH t DQpwL t DQpwH t DAh1 Copyright 2004 Cirrus Logic (All Rights Reserved) Typ Max t - HCLK t - HCLK × HCLK t - HCLK 0 - × (WST1 + HCLK × HCLK 0 - × (WST1 + HCLK × HCLK t - HCLK t - HCLK t ADh t t WRpwL t DQpwL EP9302 Unit CSh t DAh2 21 ...

Page 22

... EP9302 High Speed ARM9 System-on-Chip Processor with MaverickCrunch Static Memory Burst Read Cycle Parameter CSn assert to Address 1 transition time Address 2 assert time AD hold from CSn deassert time CSn assert time CSn to RDn assert delay time RDn assert time CSn to DQMn assert delay time ...

Page 23

... Figure 11. Static Memory Single Read Wait Cycle Timing Measurement DS653PP2 High Speed ARM9 System-on-Chip Processor with MaverickCrunch Symbol Min × (WST1- WAITd HCLK × WAITpw HCLK × CSnd HCLK t WAITd t WAITpw Copyright 2004 Cirrus Logic (All Rights Reserved) Typ Max - - × 510 t - HCLK × HCLK t CSnd EP9302 Unit ...

Page 24

... EP9302 High Speed ARM9 System-on-Chip Processor with MaverickCrunch Static Memory Single Write Wait Cycle Parameter WAIT to WRn deassert delay time CSn assert to WAIT time WAIT assert time WAIT to CSn deassert delay time AD CSn WRn RDn DQMn DA WAIT Figure 12. Static Memory Single Write Wait Cycle Timing Measurement ...

Page 25

... X and Y represent any two chip select numbers. AD CSn0 X CSn1 Y WRn RDn DQMn DA WAIT Figure 13. Static Memory Turnaround Cycle Timing Measurement DS653PP2 High Speed ARM9 System-on-Chip Processor with MaverickCrunch Symbol Min t - BTcyc t BTcyc Copyright 2004 Cirrus Logic (All Rights Reserved) Typ Max × (IDCY+ HCLK EP9302 Unit ns 25 ...

Page 26

... EP9302 High Speed ARM9 System-on-Chip Processor with MaverickCrunch Ethernet MAC Interface Parameter TXCLK cycle time TXCLK high time TXCLK low time TXCLK to signal transition delay time TXCLK rise/fall time RXCLK cycle time RXCLK high time RXCLK low time RXDVAL / RXERR setup time ...

Page 27

... PHY) DS653PP2 High Speed ARM9 System-on-Chip Processor with MaverickCrunch t t TX_high TX_low t TX_per t RXrf t RXh t RXs t MDCrf t MDC_low t MDIOd Figure 14. Ethernet MAC Timing Measurement Copyright 2004 Cirrus Logic (All Rights Reserved) t TXrf t t RX_low RX_high t RX_per t t MDIOs MDIOh EP9302 27 ...

Page 28

... EP9302 High Speed ARM9 System-on-Chip Processor with MaverickCrunch Audio Interface The following table contains the values for the timings of each of the SPI modes. Parameter SCLK cycle time SCLK high time SCLK low time SCLK rise/fall time Data from master valid delay time ...

Page 29

... DMd t t DSd DSs SSPRXD MSB from slave SFRM DS653PP2 High Speed ARM9 System-on-Chip Processor with MaverickCrunch t clk_per t clk_low t DMh t DSh Figure 17. SPI Format with SPH=1 Timing Measurement Copyright 2004 Cirrus Logic (All Rights Reserved) t clkrf LSB LSB EP9302 29 ...

Page 30

... EP9302 High Speed ARM9 System-on-Chip Processor with MaverickCrunch 2 Inter-IC Sound - I S Parameter SCLK cycle time SCLK high time SCLK low time SCLK rise/fall time SCLK to LRCLK assert delay time LRCLK from SCLK assert hold time SDI to SCLK deassert setup time SDI from SCLK deassert hold time ...

Page 31

... High Speed ARM9 System-on-Chip Processor with MaverickCrunch Symbol t clk_per t clk_high t clk_low = clk_high t clk_low t f clkrf rout fout rfout t rout rfout Figure 19. AC ‘97 Configuration Timing Measurement Copyright 2004 Cirrus Logic (All Rights Reserved) Min Typ Max - 81 clkr clkf rfin rout fout t rfin fout rfout EP9302 Unit ...

Page 32

... EP9302 High Speed ARM9 System-on-Chip Processor with MaverickCrunch ADC Parameter Resolution Integral non-linearity Offset error Full scale error Maximum sample rate Channel switch settling time Noise (RMS) - typical Note: ADIV refers to bit 16 in the KeyTchClkDiv register. ADIV = 0 means the input clock to the ADC module is equal to the external 14.7456 MHz clock divided by 4. ...

Page 33

... TCK t JPzx TDO DS653PP2 High Speed ARM9 System-on-Chip Processor with MaverickCrunch t JPs t JPco Figure 21. JTAG Timing Measurement Copyright 2004 Cirrus Logic (All Rights Reserved) Symbol Min Max t 100 - clk_per clk_high clk_low JPs JPh JPco JPzx JPxz t JPh t JPxz EP9302 Units ...

Page 34

... EP9302 High Speed ARM9 System-on-Chip Processor with MaverickCrunch 208 Pin LQFP Package Outline 208-Pin LQFP (28 × 28 × 1.40-mm Body) 2.19 29.60 (1.165) 30.40 (1.197) 0.50 (0.0197) BSC Pin 208 0.09 (0.004) 0.20 (0.008) NOTES: 1) Dimensions are in millimeters, and controlling dimension is millimeter. ...

Page 35

... Pin LQFP Pinout The following table shows the 208 pin LQFP pinout. • VDD_core is CVDD. • VDD_ring is RVDD. • NC means that the pin is not connected. DS653PP2 High Speed ARM9 System-on-Chip Processor with MaverickCrunch Copyright 2004 Cirrus Logic (All Rights Reserved) EP9302 35 ...

Page 36

... EP9302 High Speed ARM9 System-on-Chip Processor with MaverickCrunch Pin List The following Low-Profile Quad Flat Pack (LQFP) pin assignment table is sorted in order of pin. Pin Pin Pin Pin Number Name Number Name 1 CSn[7] 36 AD[5] 2 CSn[6] 37 DA[12] 3 CSn[3] 38 AD[4] 4 CSn[2] 39 DA[11] 5 CSn[1] 40 AD[3] ...

Page 37

... The second table (Table signal multiplexing and configuration options. Table summary of the EP9302 pin signals, which illustrates the pad type and pad pull type (if any). The symbols used in the table are defined as follows. (Note: A blank box means Not Applicable (NA) or, for Pull Type, No Pull (NP) ...

Page 38

... EP9302 High Speed ARM9 System-on-Chip Processor with MaverickCrunch Table Q. Pin Descriptions (Continued) Pad Pull Pin Name Block Type Type ARSTn AC97 8ma AC97 reset SCLK1 SPI1 I/O, 8ma PD SPI bit clock SFRM1 SPI1 I/O, 8ma PD SPI Frame Clock SSPRX1 SPI1 I PD ...

Page 39

... Celsius Hertz = cycle per second Kilobits per second Kilobyte KiloHertz = 1000 Hz Megabits per second MegaHertz = 1,000 KiloHertz -6 microAmpere = 10 Ampere microsecond = 1,000 nanoseconds = 10 -3 milliAmpere = 10 Ampere millisecond = 1,000 microseconds = 10 -3 milliWatt = 10 Watts -9 nanosecond = 10 seconds -12 picoFarad = 10 Farads Volt Watt EP9302 -6 seconds -3 seconds 39 ...

Page 40

... EP9302 High Speed ARM9 System-on-Chip Processor with MaverickCrunch ORDERING INFORMATION The order numbers for the device are: EP9302-CQ EP9302-CQZ -40 ° +85 ° C EP9302-IQ -40 ° +85 ° C EP9302-IQZ EP9302 — CQZ Part Number Product Line: Embedded Processor Note the Cirrus Logic Internet site at http://www.cirrus.com to find contact information for your local sales representative. ...

Related keywords