ZA9L10D1NW2CSGA499 Zilog, ZA9L10D1NW2CSGA499 Datasheet - Page 2
![ARM9 POS ASSP](/photos/12/25/122551/za9l10d1nw2csga499_sml.jpg)
ZA9L10D1NW2CSGA499
Manufacturer Part Number
ZA9L10D1NW2CSGA499
Description
ARM9 POS ASSP
Manufacturer
Zilog
Series
Zatara®r
Datasheet
1.ZA9L10D1NW2CSGA401.pdf
(8 pages)
Specifications of ZA9L10D1NW2CSGA499
Core Processor
ARM9
Core Size
32-Bit
Speed
200MHz
Connectivity
EBI/EMI, SmartCard, SPI, UART/USART, USB OTG
Peripherals
DMA, LCD, Magnetic Card Reader, POR, PWM, WDT
Number Of I /o
76
Program Memory Type
ROMless
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
1.7 V ~ 1.9 V
Data Converters
A/D 6x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
256-LBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Other names
269-4716
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ZA9L10D1NW2CSGA499
Manufacturer:
MALAYSIA
Quantity:
20
Company:
Part Number:
ZA9L10D1NW2CSGA499
Manufacturer:
Maxim Integrated
Quantity:
10 000
ARM-bASEd ASSP foR SEcuRE TRAnSAcTIonS
ZATARA
key features
•
•
•
security subsystem
peripheral set for pos
comm
TM
.
interfaces
SERIES 32-bIT ASSP
Feature Details of the Zatara Series 32-Bit ASSP
security subsystem
The security subsystem provides
The internal battery power regulator supports the secure memory, the security controller, the tamper
switches and the RTC. Tamper detection is done through a variety of sensors, including tamper switch-
es, clock frequency and glitch protection as well as wire mesh sensors. In addition, the Zatara Series
ASSPs integrate true 32-bit random number generation and hash generation per the SHA-1 protocol.
Maintain peace of mind and greater protection for your end applications with the Zatara Series Security
Subsystem.
comprehensive peripheral set
The Zatara Series offers a broad offering of peripherals that meet the needs of the secure transactions
marketplace:
communication interfaces
Communication interfaces available on the Zatara Series include:
• Physical and Environmental protection
• Key Generation and Hash Algorithms
• Secure Storage and Zeroization
• Secure Boot
• Smart card controllers (2) that interface directly to an ON semiconductor (NCN6001) or Phillips
• Magnetic Card Reader (MCR) that directly interfaces to the magnetic head and has simultaneous
• Integrated soft modem through Integrated Data Access Arrangement (DAA) interface for
• Integrated LCD interface, directly compatible with popular monochrome LCD displays, text or
• External Bus Interface to standard asynchronous memories including SRAM, ROM, Flash
• Up to 76 GPIO pins (16 dedicated)
• Three UARTs
• Two dedicated SPI interfaces
• USB*
*: Selected parts only (see order information for more details)
(TDA8002) Smart Card interface
three-track reading. ISO 7811-3 and 7811-6 compliant
connecting a Conextant modem (model #CX20493-5X)*
graphic modes. The LCD display supports interfacing to 4-bit or 8-bit data; 3-control and
1-contrast.
and standard PC100/133 SDRAM
– All configurable as edge interrupts or level interrupts
– Full input/output or tri-state control
– 1 x 8-wire interface
– 2 x 4-wire interface (UART2 shared with IrDA encoder/decoder)
– USB 2.0-compatible
– Full Speed; On-the-Go (OTG)
SRAM (4KB)
Secure
Subsystem
Boot ROM
Security
Secure
Battery-backed Security Island
SEcuRE TRAnSAcTIon SoluTIonS
Tamper
Circuits
RNG
(64KB zero wait state)
RTC
SRAM
SHA-1
controller
Security
PB022105-0608
2