C8051T633-GM Silicon Laboratories Inc, C8051T633-GM Datasheet - Page 61
![IC MCU 4KB 20PIN QFN](/photos/12/25/122567/silicon_laboratories_inc-20-qfn_sml.jpg)
C8051T633-GM
Manufacturer Part Number
C8051T633-GM
Description
IC MCU 4KB 20PIN QFN
Manufacturer
Silicon Laboratories Inc
Series
C8051T63xr
Specifications of C8051T633-GM
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
17
Program Memory Size
4KB (4K x 8)
Program Memory Type
OTP
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-QFN
Processor Series
C8051T6x
Core
8051
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
UART, SPI, SMBus
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
17
Number Of Timers
4 x 16-bit
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051T630DK
Minimum Operating Temperature
- 40 C
For Use With
336-1464 - KIT DEV FOR C8051T630 FAMILY
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Details
Other names
336-1461-5
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
C8051T633-GM
Manufacturer:
Silicon
Quantity:
270
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11.1. Comparator Multiplexer
C8051T630/1/2/3/4/5 devices include an analog input multiplexer to connect Port I/O pins to the compara-
tor inputs. The Comparator0 inputs are selected in the CPT0MX register (SFR Definition 11.3). The
CMX0P3–CMX0P0 bits select the Comparator0 positive input; the CMX0N3–CMX0N0 bits select the
Comparator0 negative input. Important Note About Comparator Inputs: The Port pins selected as com-
parator inputs should be configured as analog inputs in their associated Port configuration register, and
configured to be skipped by the Crossbar (for details on Port configuration, see Section “20.6. Special
Function Registers for Accessing and Configuring Port I/O” on page 121).
Figure 11.3. Comparator Input Multiplexer Block Diagram
P0.1
P0.3
P0.5
P0.7
P1.1
P1.3
P1.5
P1.7
P0.0
P0.2
P0.4
P0.6
P1.0
P1.2
P1.4
P1.6
CPT0MX
Rev. 1.0
CP0 +
CP0 -
+
-
VDD
GND
C8051T630/1/2/3/4/5
61
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