MC9S08QG4CFQE Freescale Semiconductor, MC9S08QG4CFQE Datasheet - Page 111

IC MCU 4K FLASH 8MHZ 8-QFN-D

MC9S08QG4CFQE

Manufacturer Part Number
MC9S08QG4CFQE
Description
IC MCU 4K FLASH 8MHZ 8-QFN-D
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet

Specifications of MC9S08QG4CFQE

Core Processor
HCS08
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
4
Program Memory Size
4KB (4K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
8-DFN
Processor Series
S08QG
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
SCI/SPI
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
4
Number Of Timers
1
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
DEMO9S08QG8E
Minimum Operating Temperature
- 40 C
On-chip Adc
4-ch x 10-bit
Package
8DFN EP
Family Name
HCS08
Maximum Speed
20 MHz
Lead Free Status / RoHS Status
Request inventory verification / Request inventory verification
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
8.1.3
The ACMP has the following features:
8.1.4
This section defines the ACMP operation in wait, stop, and background debug modes.
8.1.4.1
The ACMP continues to run in wait mode if enabled before executing the WAIT instruction. Therefore,
the ACMP can be used to bring the MCU out of wait mode if the ACMP interrupt, ACIE, is enabled. For
lowest possible current consumption, the ACMP should be disabled by software if not required as an
interrupt source during wait mode.
8.1.4.2
The ACMP is disabled in all stop modes, regardless of the settings before executing the STOP instruction.
Therefore, the ACMP cannot be used as a wake up source from stop modes.
During either stop1 or stop2 mode, the ACMP module will be fully powered down. Upon wake-up from
stop1 or stop2 mode, the ACMP module will be in the reset state.
During stop3 mode, clocks to the ACMP module are halted. No registers are affected. In addition, the
ACMP comparator circuit will enter a low power state. No compare operation will occur while in stop3.
If stop3 is exited with a reset, the ACMP will be put into its reset state. If stop3 is exited with an interrupt,
the ACMP continues from the state it was in when stop3 was entered.
8.1.4.3
When the microcontroller is in active background mode, the ACMP will continue to operate normally.
8.1.5
The block diagram for the analog comparator module is shown
Freescale Semiconductor
Full rail-to-rail supply operation.
Less than 40 mV of input offset.
Less than 15 mV of hysteresis.
Selectable interrupt on rising edge, falling edge, or either rising or falling edges of comparator
output.
Option to compare to fixed internal bandgap reference voltage.
Option to allow comparator output to be visible on a pin, ACMPO.
Features
Modes of Operation
Block Diagram
ACMP in Wait Mode
ACMP in Stop Modes
ACMP in Active Background Mode
MC9S08QG8 and MC9S08QG4 Data Sheet, Rev. 5
Figure
8-2.
Analog Comparator (S08ACMPV2)
109

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