C8051F829-GS Silicon Laboratories Inc, C8051F829-GS Datasheet - Page 247

IC MCU 8BIT 8KB FLASH 16SOIC

C8051F829-GS

Manufacturer Part Number
C8051F829-GS
Description
IC MCU 8BIT 8KB FLASH 16SOIC
Manufacturer
Silicon Laboratories Inc
Series
C8051F82xr
Datasheet

Specifications of C8051F829-GS

Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
13
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
16-SOIC (3.9mm Width)
Processor Series
C8051F8x
Core
8051
Data Bus Width
16 bit
Data Ram Size
256 B
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
13
Number Of Timers
3
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F800DK
Minimum Operating Temperature
- 55 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
 Details
Other names
336-1809-5

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
C8051F829-GS
Manufacturer:
Silicon Laboratories Inc
Quantity:
135
30.2. C2CK Pin Sharing
The C2 protocol allows the C2 pins to be shared with user functions so that in-system debugging and
Flash programming may be performed. This is possible because C2 communication is typically performed
when the device is in the halt state, where all on-chip peripherals and user software are stalled. In this
halted state, the C2 interface can safely “borrow” the C2CK (RST) and C2D pins. In most applications,
external resistors are required to isolate C2 interface traffic from the user application. A typical isolation
configuration is shown in Figure 30.1.
The configuration in Figure 30.1 assumes the following:
1. The user input (b) cannot change state while the target device is halted.
2. The RST pin on the target device is used as an input only.
Additional resistors may be necessary depending on the specific application.
Output (c)
RST (a)
Input (b)
Figure 30.1. Typical C2 Pin Sharing
C2 Interface Master
Rev. 1.0
C2CK
C2D
C8051Fxxx
C8051F80x-83x
247

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