C8051F369-GM Silicon Laboratories Inc, C8051F369-GM Datasheet - Page 95

• Manufacturer Part Number: C8051F369-GM
• Description: IC 8051 MCU 16K FLASH 28-QFN
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F36xr

Specifications of C8051F369-GM

• Program Memory Type: FLASH
• Program Memory Size: 16KB (16K x 8)
• Package / Case: 28-QFN
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 50MHz
• Connectivity: SMBus (2-Wire/I²C), SPI, UART/USART
• Peripherals: POR, PWM, Temp Sensor, WDT
• Number Of I /o: 25
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 17x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: C8051F3x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: I2C/SMBus/SPI/UART
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 25
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: KSK-SL-TOOLSTICK, PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051F360DK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 21-ch x 10-bit
• On-chip Dac: 1-ch x 10-bit
• A/d Bit Size: 10 bit
• A/d Channels Available: 21
• Height: 0.83 mm
• Length: 5 mm
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 2.7 V
• Width: 5 mm
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 770-1006 - ISP 4PORT FOR SILABS C8051F MCU336-1410 - KIT DEV FOR C8051F360 FAMILY
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1651

Bits 7–0: SFR Page Stack Bits: SFR page context is retained upon interrupts/return from interrupts in
Bits 7–0: SFR Page Stack Bits: SFR page context is retained upon interrupts/return from interrupts in
SFR Page:
SFR Address:
SFR Page:
SFR Address:
R/W
R/W
Bit7
Bit7
a 3 byte SFR Page Stack: SFRPAGE is the first entry, SFRNEXT is the second, and SFR-
LAST is the third entry. The SFR stack bytes may be used alter the context in the SFR Page
Stack, and will not cause the stack to ‘push’ or ‘pop’. Only interrupts and return from inter-
rupts cause pushes and pops of the SFR Page Stack.
Write: Sets the SFR Page contained in the second byte of the SFR Stack. This will cause
the SFRPAGE SFR to have this SFR page value upon a return from interrupt.
Read: Returns the value of the SFR page contained in the second byte of the SFR stack.
This is the value that will go to the SFR Page register upon a return from interrupt.
a 3 byte SFR Page Stack: SFRPAGE is the first entry, SFRNEXT is the second, and SFR-
LAST is the third entry. The SFR stack bytes may be used alter the context in the SFR Page
Stack, and will not cause the stack to ‘push’ or ‘pop’. Only interrupts and return from inter-
rupts cause pushes and pops of the SFR Page Stack.
Write: Sets the SFR Page in the last entry of the SFR Stack. This will cause the SFRNEXT
SFR to have this SFR page value upon a return from interrupt.
Read: Returns the value of the SFR page contained in the last entry of the SFR stack.
all pages
0x85
all pages
0x86
R/W
R/W
Bit6
Bit6
SFR Definition 9.3. SFRNEXT: SFR Next Register
SFR Definition 9.4. SFRLAST: SFR Last Register
R/W
R/W
Bit5
Bit5
R/W
R/W
Bit4
Bit4
C8051F360/1/2/3/4/5/6/7/8/9
Rev. 1.0
R/W
R/W
Bit3
Bit3
R/W
R/W
Bit2
Bit2
R/W
R/W
Bit1
Bit1
R/W
Bit0
R/W
Bit0
00000000
Reset Value
00000000
Reset Value
95