C8051F712-GM Silicon Laboratories Inc, C8051F712-GM Datasheet - Page 48
![IC 8051 MCU 8K FLASH 48-QFN](/photos/12/26/122699/c8051f712-gm_sml.jpg)
C8051F712-GM
Manufacturer Part Number
C8051F712-GM
Description
IC 8051 MCU 8K FLASH 48-QFN
Manufacturer
Silicon Laboratories Inc
Series
C8051F71xr
Specifications of C8051F712-GM
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
Cap Sense, POR, PWM, Temp Sensor, WDT
Number Of I /o
39
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Eeprom Size
32 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-QFN
Processor Series
C8051F7x
Core
8051
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
I2C, SMBus, SPI, UART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
39
Number Of Timers
4
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F700DK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
For Use With
336-1635 - DEV KIT FOR C8051F700
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
336-1643-5
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
C8051F712-GM
Manufacturer:
Silicon Laboratories Inc
Quantity:
135
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C8051F70x/71x
9.2. Electrical Characteristics
Table 9.2. Global Electrical Characteristics
–40 to +85 °C, 25 MHz system clock unless otherwise specified.
48
Parameter
Supply Voltage
Digital Supply Current with
CPU Active (Normal Mode
Digital Supply Current with
CPU Inactive (Idle Mode
Digital Supply Current
(shutdown)
Digital Supply RAM Data
Retention Voltage
Specified Operating
Temperature Range
SYSCLK
(system clock frequency)
Tsysl (SYSCLK low time)
Tsysh (SYSCLK high time)
Notes:
1. Analog performance is not guaranteed when V
2. Includes bias current for internal voltage regulator.
3. SYSCLK must be at least 32 kHz to enable debugging.
3
1
2,3
2,3
)
)
Stop/suspend mode, Reg Bypass, 25 °C
Stop/suspend mode, Reg On, 25 °C
V
V
V
V
V
V
V
V
V
V
V
V
Regulator in Bypass Mode
Regulator in Normal Mode
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
= 1.8 V, Clock = 25 MHz
= 3.0 V, Clock = 25 MHz
= 1.8 V, Clock = 25 MHz
= 3.0 V, Clock = 25 MHz
= 1.8 V, Clock = 32 kHz
= 3.0 V, Clock = 32 kHz
= 1.8 V, Clock = 32 kHz
= 3.0 V, Clock = 32 kHz
= 1.8 V, Clock = 1 MHz
= 3.0 V, Clock = 1 MHz
= 1.8 V, Clock = 1 MHz
= 3.0 V, Clock = 1 MHz
See Note 3.
Conditions
DD
Rev. 1.0
is below 1.8 V.
Min
–40
1.8
1.7
18
18
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
0
Typ
175
190
180
200
110
3.0
1.8
5.0
1.2
5.5
1.3
2.5
3.2
1.3
90
80
—
—
—
—
2
Max
+85
3.6
1.9
6.5
7.0
4.0
4.5
90
25
—
—
—
—
—
—
—
—
—
—
—
4
Units
MHz
mA
mA
mA
mA
mA
mA
µA
µA
µA
µA
µA
µA
µA
µA
°C
ns
ns
V
V
V
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