MC9S12C32MFUE25 Freescale Semiconductor, MC9S12C32MFUE25 Datasheet - Page 20

• Manufacturer Part Number: MC9S12C32MFUE25
• Description: IC MCU 32K FLASH 25MHZ 80-QFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12C32MFUE25

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 60
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.35 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 80-QFP
• Processor Series: S12C
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 2 KB
• Interface Type: CAN/SCI/SPI
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 60
• Number Of Timers: 8
• Operating Supply Voltage: 3.3 V to 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: M68EVB912C32EE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• For Use With: CML12C32SLK - KIT STUDENT LEARNING 16BIT HCS12
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Chapter 1 MC9S12C and MC9S12GC Device Overview (MC9S12C128)
1.1.3
20
TEST/V
RESET
V
V
EXTAL
Multiplexed
Wide Bus
BKGD
DDPLL
XTAL
SSPLL
V
V
V
V
V
V
V
V
XFC
PE0
PE1
PE2
PE3
PE4
PE5
PE6
PE7
DDR
DDX
SSR
SSX
DD2
DD1
SS2
SS1
PP
Block Diagram
Internal Logic 2.5V
PLL 2.5V
V
V
V
V
MODC/TAGHI
DDPLL
SSPLL
DD1,2
SS1,2
PLL
16K, 32K, 64K, 96K, 128K Byte Flash
Figure 1-1. MC9S12C-Family / MC9S12GC-Family Block Diagram
DDRA
PTA
Multiplexed Address/Data Bus
Generation
Clock and
Module
Reset
XIRQ
LSTRB/TAGLO
ECLK
MODA/IPIPE0
MODB/IPIPE1
NOACC/XCLKS
1K, 2K, 4K Byte RAM
IRQ
R/W
Voltage Regulator
BDM
Periodic Interrupt
I/O Driver 5V
A/D Converter 5V
COP Watchdog
Clock Monitor
MC9S12C-Family / MC9S12GC-Family
HCS12
Integration
V
V
V
V
CPU
DDRB
System
DDX
DDA
Module
SSX
SSA
PTB
(SIM)
Rev 01.24
MSCAN is not available on the
9S12GC Family Members
SPI
SCI
Signals shown in Bold are not available on the 52 or 48 Pin Package
Signals shown in Bold Italic are available in the 52, but not the 48 Pin Package
MSCAN
Module
Module
Timer
PWM
Voltage Regulator 5V & I/O
ATD
V
V
DDR
SSR
IOC0
IOC1
IOC2
IOC3
IOC4
IOC5
IOC6
IOC7
PW0
PW1
PW2
PW3
PW4
PW5
V
for 52- and 48-Pin packages
RL
RXCAN
TXCAN
is bonded internally to V
MISO
MOSI
V
V
RXD
SCK
TXD
AN0
AN1
AN2
AN3
AN4
AN5
AN6
AN7
V
DDA
V
SSA
SS
MUX
RH
RL
SSA
Freescale Semiconductor
V
V
V
V
DDA
SSA
RH
RL
PAD0
PAD1
PAD2
PAD3
PAD4
PAD5
PAD6
PAD7
PT0
PT1
PT2
PT3
PT4
PT5
PT6
PT7
PP0
PP1
PP2
PP3
PP4
PP5
PP6
PP7
PJ6
PJ7
PS0
PS1
PS2
PS3
PM0
PM1
PM2
PM3
PM4
PM5