M30853FHFP#U5 Renesas Electronics America, M30853FHFP#U5 Datasheet - Page 189
![IC M32C MCU FLASH 384K 100QFP](/photos/12/30/123068/m30853fhfp_u5_sml.jpg)
M30853FHFP#U5
Manufacturer Part Number
M30853FHFP#U5
Description
IC M32C MCU FLASH 384K 100QFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Specifications of M30853FHFP#U5
Core Processor
M32C/80
Core Size
16/32-Bit
Speed
32MHz
Connectivity
CAN, I²C, IEBus, SIO, UART/USART
Peripherals
DMA, WDT
Number Of I /o
85
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
24K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 26x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
100-QFP
For Use With
R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
M30853FHFP#U5M30853FHFP#D5
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
M30853FHFP#U5M30853FHFP#U3
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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3
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J
2
Figure 15.9 TA0MR to TA4MR Registers
0
C
1
9
0 .
8 /
B
0
3
5
0
3
G
J
7
u
o r
0 -
. l
Timer Ai Mode Register
b7
NOTES:
u
0
1
p
, 1
0
b6
1. The TAiTGH and TAiTGL bits in the ONSF or TRGSR register determine the count source in the event
2. MR1 bit setting is enabled only when counting how many times external signals are applied.
3. The timer decrements a counter value when an "L" signal is applied to the TA
4. The TCK1 bit is enabled only in the TA3MR register.
5. For two-phase pulse signal processing, set the TAjP bit in the UDF register (j=2 to 4) to "1" (two-phase
3
(
2
M
counter mode.
increments a counter value when an "H" signal is applied to the TA
pulse signal processing function enabled). Also, set the TAiTGH and TAiTGL bits to "00
TAj
b5
0
0
3
0
IN
5
2
b4
C
pin).
8 /
b3
Page 164
, 5
b2
0
M
3
b1
0
2
C
b0
1
f o
8 /
4
5
TMOD0
TMOD1
Symbol
9
TCK0
TCK1
) T
MR1
MR2
MR3
(b2)
4
Bit
Symbol
TA0MR to TA4MR
(i=0 to 4)
Operating Mode
Select Bit
Reserved Bit
Count Polarity
Select Bit
Increment/Decrement
Switching Source
Select Bit
Two-Phase Pulse
Signal Processing
Operation Select Bit
Count Operation
Type Select Bit
Set to "0" in event counter mode
Bit Name
(Event Counter Mode)
(2)
Address
0356
(4,5)
16
, 0357
b1b0
Set to "0"
0 : Counts falling edges
1 : Counts rising edges
0 : UDF registser
1 : Input signal to
0 : Reloading
1 : Free running
0 1 : Event counter mode
Set to "0"
two-phase pulse signal)
(When not processing
of an external signal
of an external signal
setting
TAi
16
, 0358
Function
OUT
pin
16
, 0359
iOUT
(3)
pin.
16
, 035A
0 : Normal processing
1 : Multiply-by-4
Set to "0"
Set to "1"
two-phase pulse signal)
iOUT
(When processing
operation
processing operation
(1)
16
Function
pin and the timer
After Reset
00
16
2
" (input to the
15. Timer (Timer A)
RW
RW
RW
RW
RW
RW
RW
RW
RW
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