C8051F017R Silicon Laboratories Inc, C8051F017R Datasheet - Page 110

IC 8051 MCU 32K FLASH 32LQFP

C8051F017R

Manufacturer Part Number
C8051F017R
Description
IC 8051 MCU 32K FLASH 32LQFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F01xr
Datasheets

Specifications of C8051F017R

Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
8
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 4x10b; D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
336-1042-2
Q1057388

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
C8051F017R
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
Bits7-0: P1.[7:0]
Bits7-0: PRT1CF.[7:0]: Output Configuration Bits for P1.7-P1.0 (respectively)
Bit7:
Bit6:
Bit5:
Bit4:
Bits3-0: UNUSED. Read = 0000b, Write = don’t care.
P1.7
R/W
R/W
R/W
Bit7
Bit7
IE7
Bit7
(Write – Output appears on I/O pins per XBR0, XBR1, and XBR2 registers)
0: Logic Low Output.
1: Logic High Output (high-impedance if corresponding PRT1CF.n bit = 0)
(Read – Regardless of XBR0, XBR1, and XBR2 Register settings).
0: P1.n pin is logic low.
1: P1.n pin is logic high.
0: Corresponding P1.n Output mode is Open-Drain.
1: Corresponding P1.n Output mode is Push-Pull.
IE7: External Interrupt 7 Pending Flag.
0: No falling edge detected on P1.7.
1: This flag is set by hardware when a falling edge on P1.7 is detected.
IE6: External Interrupt 6 Pending Flag.
0: No falling edge detected on P1.6.
1: This flag is set by hardware when a falling edge on P1.6 is detected.
IE5: External Interrupt 5 Pending Flag.
0: No falling edge detected on P1.5.
1: This flag is set by hardware when a falling edge on P1.5 is detected.
IE4: External Interrupt 4 Pending Flag.
0: No falling edge detected on P1.4.
1: This flag is set by hardware when a falling edge on P1.4 is detected.
P1.6
R/W
R/W
R/W
Bit6
Bit6
IE6
Bit6
Figure 15.10. PRT1IF: Port1 Interrupt Flag Register
Figure 15.9. PRT1CF: Port1 Configuration Register
P1.5
R/W
R/W
R/W
Bit5
Bit5
Bit5
IE5
Figure 15.8. P1: Port1 Register
P1.4
R/W
R/W
R/W
Bit4
Bit4
IE4
Bit4
Rev. 1.7
P1.3
R/W
R/W
R/W
Bit3
Bit3
Bit3
-
P1.2
R/W
R/W
R/W
Bit2
Bit2
Bit2
-
C8051F000/1/2/5/6/7
C8051F010/1/2/5/6/7
P1.1
R/W
R/W
R/W
Bit1
Bit1
Bit1
-
(bit addressable)
P1.0
R/W
R/W
R/W
Bit0
Bit0
Bit0
-
0x90
SFR Address:
SFR Address:
SFR Address:
Reset Value
Reset Value
Reset Value
11111111
00000000
00000000
0xAD
0xA5
110

Related parts for C8051F017R