PIC16F54-E/P Microchip Technology, PIC16F54-E/P Datasheet - Page 12
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PIC16F54-E/P
Manufacturer Part Number
PIC16F54-E/P
Description
IC MCU FLASH 512X12 18DIP
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Specifications of PIC16F54-E/P
Program Memory Type
FLASH
Program Memory Size
768B (512 x 12)
Package / Case
18-DIP (0.300", 7.62mm)
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Peripherals
POR, WDT
Number Of I /o
12
Ram Size
25 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
25 B
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
12
Number Of Timers
1
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
DV164120, DV164101, ICE2000
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Connectivity
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
PIC16F54
5.0
TABLE 5-1:
DS41207D-page 12
AC/DC CHARACTERISTICS
General
V
V
I
I
V
I
T
T
V
V
T
T
Serial Program/Verify
T
T
T
T
T
T
T
T
T
Note 1:
DDPROG
DDERA
PP
SET
SET
ERA
VHHR
PPDP
HLD
HLD
DLY
DLY
DLY
PROG
DIS
RESET
DDPROG
DDERA
PP
IH
IL
Sym.
1
1
0
1
1
2
3
0
1
PROGRAM/VERIFY MODE ELECTRICAL CHARACTERISTICS
Minimum time to ensure that function completes successfully over voltage, temperature and device variations.
V
program memory
V
program memory
I
program memory
I
program memory
High voltage on MCLR for
Program/Verify mode entry
MCLR pin current during Program/Verify
mode
MCLR rise time (V
Program/Verify mode entry
Hold time after V
(ICSPCLK, ICSPDAT) input high-level
(ICSPCLK, ICSPDAT) input low-level
ICSPCLK, ICSPDAT setup time before
MCLR↑ (Program/Verify mode selection
pattern setup time)
ICSPCLK, ICSPDAT hold time after
MCLR↑ (Program/Verify mode selection
pattern setup time)
Data in setup time before clock↓
Data in hold time after clock↓
Data input not driven to next clock input
(delay required between command/data
or command/command)
Delay between clock↓ to clock↑ of next
command or data
Clock↑ to data out valid (during Read
Data)
Erase cycle time
Programming cycle time (externally
timed)
Time delay for internal programming
voltage discharge
Time between exiting Program mode
with V
re-entering Program mode by applying
V
DD
DD
DD
DD
DD
level for programming operations,
level for Bulk Erase operations,
level for programming operations,
level for Bulk Erase operations,
DD
AC/DC CHARACTERISTICS TIMING REQUIREMENTS FOR PROGRAM/VERIFY
MODE
and V
Characteristics
PP
PP
at G
SS
↑
to V
ND
IHH
and then
) for
Preliminary
Standard Operating Conditions (unless otherwise stated)
Operating Temperature
Operating Voltage
0.8 V
Min.
12.5
100
100
100
100
4.5
4.5
1.0
1.0
—
—
—
—
—
—
—
—
5
5
DD
Typ.
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
10
0.2 V
Max.
10
13.5
0.45
2
5.5
5.5
0.5
0.5
1.0
80
—
—
—
—
—
—
—
—
—
—
(1)
(1)
10°C ≤ T
4.5V ≤ V
DD
Units
DD
A
mA
mA
mA
ms
ms
ms
μs
μs
ns
μs
ns
ns
μs
μs
ns
μs
V
V
V
V
V
© 2007 Microchip Technology Inc.
≤ 40°C
≤ 5.5V
Conditions/Comments