PIC12F615-E/MF Microchip Technology, PIC12F615-E/MF Datasheet - Page 3
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PIC12F615-E/MF
Manufacturer Part Number
PIC12F615-E/MF
Description
IC PIC MCU FLASH 1KX14 8DFN
Manufacturer
Microchip Technology
Series
PIC® 12Fr
Datasheets
1.PIC12F609T-ISN.pdf
(212 pages)
2.PIC12F609T-ISN.pdf
(26 pages)
3.PIC12F609T-ISN.pdf
(8 pages)
4.PIC12F615-EMF.pdf
(196 pages)
Specifications of PIC12F615-E/MF
Program Memory Type
FLASH
Program Memory Size
1.75KB (1K x 14)
Package / Case
8-DFN
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
5
Ram Size
64 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Processor Series
PIC12F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
64 B
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
5
Number Of Timers
3
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 4 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
APGRD004 - REF DESIGN MOD AUTO AMBNT LIGHTAC164324 - MODULE SKT FOR MPLAB 8DFN/16QFN
Eeprom Size
-
Connectivity
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
3.0
3.1
The user memory space extends from 0x0000 to
0x1FFF. In Program/Verify mode, the program memory
space extends from 0x0000 to 0x3FFF, with the first
half (0x0000-0x1FFF) being user program memory and
the second half (0x2000-0x3FFF) being configuration
memory. The Program Counter (PC) will increment
from 0x0000 to 0x1FFF and wrap to 0x0000. If the PC
is between 0x2000 to 0x3FFF it will wrap around to
0x2000 (not to 0x0000). Once in configuration memory,
the highest bit of the PC stays a ‘1’, thus always point-
ing to the configuration memory. The only way to point
to user program memory is to reset the part and re-
enter
Section 4.0 “Program/Verify Mode”.
For all of the devices covered in this document, the
configuration memory space, 0x2000 to 0x2008, is
physically implemented. However, only locations
0x2000 to 0x2003, 0x2007 and 0x2008 are available.
Other locations are reserved.
3.2
A user may store identification information (user ID) in
four designated locations. The user ID locations are
mapped in 0x2000 to 0x2003. It is recommended that
the user use only the seven Least Significant bits
(LSbs) of each user ID location. The user ID locations
read out normally, even after code protection is
enabled. It is recommended that ID locations are writ-
ten as ‘xx xxxx xbbb bbbb’ where ‘bbb bbbb’ is the
user ID information.
The 14 bits may be programmed, but only the 7 LSbs
are read and displayed by MPLAB
2009 Microchip Technology Inc.
PIC12F609/12F615/12F617/16F610/16F616 AND PIC12HV609/12HV615/16HV610/16HV616
Program/Verify
MEMORY DESCRIPTION
Program Memory Map
User ID Locations
mode
®
as
IDE.
described
in
3.3
For all of the devices covered in this document, the
4/8 MHz Internal Oscillator (INTOSC) module is fac-
tory calibrated. This value is stored in the Calibration
Word (0x2008). See the applicable device data sheet
for more information.
The Calibration Word does not necessarily participate
in the erase operation unless a specific procedure is
executed. Therefore, the device can be erased without
affecting the Calibration Word. This simplifies the erase
procedure since these values do not need to be read
and restored after the device is erased.
Calibration Word
DS41396A-page 3